Master Theses

Optimized processor simulation with VADL

Hristo Mihaylov

Flexible generation of low-level developer tools with VADL

Tobias Schwarzinger

Compiler backend generation using the VADL processor

Alexander Graf

Cycle-Accurate simulator generator for the VADL processor description language

Hermann Schützenhöfer
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VADL
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RISC-V
Faculty of Informatics
Vienna University of Technology
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