/*
 * Copyright (c) 1997-1999 Massachusetts Institute of Technology
 * Copyright (c) 2000-2002 Stefan Kral
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

/* This file was automatically generated --- DO NOT EDIT */
/* Generated on Tue Feb 19 14:17:17 CET 2002 */

#include <fftw-int.h>
#include <fftw.h>



DECLARE_SIMD_CONST2 (PK1_000000000NK1_000000000, +1.0000000000000000000000000,
		     -1.0000000000000000000000000);
DECLARE_SIMD_CONST2 (PK707106781PK707106781, +0.7071067811865475244008444,
		     +0.7071067811865475244008444);
DECLARE_SIMD_CONST2 (PK414213562NK414213562, +0.4142135623730950488016887,
		     -0.4142135623730950488016887);
DECLARE_SIMD_CONST2 (PK2_414213562NK2_414213562, +2.4142135623730950488016887,
		     -2.4142135623730950488016887);
DECLARE_SIMD_CONST2 (PK382683432NK382683432, +0.3826834323650897717284600,
		     -0.3826834323650897717284600);
DECLARE_SIMD_CONST2 (PK923879532PK923879532, +0.9238795325112867561281832,
		     +0.9238795325112867561281832);
DECLARE_SIMD_CONST2 (PK707106781NK707106781, +0.7071067811865475244008444,
		     -0.7071067811865475244008444);
DECLARE_SIMD_CONST2 (PK923879532NK923879532, +0.9238795325112867561281832,
		     -0.9238795325112867561281832);
DECLARE_SIMD_CONST2 (PK382683432PK382683432, +0.3826834323650897717284600,
		     +0.3826834323650897717284600);

void
fftw_no_twiddle_16 (const fftw_complex * inC, fftw_complex * outC,
		    int istride, int ostride)
{
     const fftw_simd2 *input = (const fftw_simd2 *) inC;
     fftw_simd2 *output = (fftw_simd2 *) outC;
     DECLARE_SIMD_TMPVAR2 (t1008);
     DECLARE_SIMD_TMPVAR2 (t1007);
     DECLARE_SIMD_TMPVAR2 (t1005);
     DECLARE_SIMD_TMPVAR2 (t1049);
     DECLARE_SIMD_TMPVAR2 (t1010);
     DECLARE_SIMD_TMPVAR2 (t1009);
     DECLARE_SIMD_TMPVAR2 (t1006);
     DECLARE_SIMD_TMPVAR2 (t1053);
     DECLARE_SIMD_TMPVAR2 (t1003);
     DECLARE_SIMD_TMPVAR2 (t1143);
     DECLARE_SIMD_TMPVAR2 (t1050);
     DECLARE_SIMD_TMPVAR2 (t1112);
     DECLARE_SIMD_TMPVAR2 (t1044);
     DECLARE_SIMD_TMPVAR2 (t1014);
     DECLARE_SIMD_TMPVAR2 (t1013);
     DECLARE_SIMD_TMPVAR2 (t1069);
     DECLARE_SIMD_TMPVAR2 (t1011);
     DECLARE_SIMD_TMPVAR2 (t1016);
     DECLARE_SIMD_TMPVAR2 (t1015);
     DECLARE_SIMD_TMPVAR2 (t1070);
     DECLARE_SIMD_TMPVAR2 (t1012);
     DECLARE_SIMD_TMPVAR2 (t1004);
     DECLARE_SIMD_TMPVAR2 (t1146);
     DECLARE_SIMD_TMPVAR2 (t1071);
     DECLARE_SIMD_TMPVAR2 (t1063);
     DECLARE_SIMD_TMPVAR2 (t1065);
     DECLARE_SIMD_TMPVAR2 (t1062);
     DECLARE_SIMD_TMPVAR2 (t1117);
     DECLARE_SIMD_TMPVAR2 (t1064);
     DECLARE_SIMD_TMPVAR2 (t1022);
     DECLARE_SIMD_TMPVAR2 (t1021);
     DECLARE_SIMD_TMPVAR2 (t1019);
     DECLARE_SIMD_TMPVAR2 (t1086);
     DECLARE_SIMD_TMPVAR2 (t1024);
     DECLARE_SIMD_TMPVAR2 (t1023);
     DECLARE_SIMD_TMPVAR2 (t1020);
     DECLARE_SIMD_TMPVAR2 (t1082);
     DECLARE_SIMD_TMPVAR2 (t1151);
     DECLARE_SIMD_TMPVAR2 (t1017);
     DECLARE_SIMD_TMPVAR2 (t1028);
     DECLARE_SIMD_TMPVAR2 (t1027);
     DECLARE_SIMD_TMPVAR2 (t1025);
     DECLARE_SIMD_TMPVAR2 (t1095);
     DECLARE_SIMD_TMPVAR2 (t1030);
     DECLARE_SIMD_TMPVAR2 (t1029);
     DECLARE_SIMD_TMPVAR2 (t1026);
     DECLARE_SIMD_TMPVAR2 (t1099);
     DECLARE_SIMD_TMPVAR2 (t1154);
     DECLARE_SIMD_TMPVAR2 (t1018);
     DECLARE_SIMD_TMPVAR2 (t1152);
     DECLARE_SIMD_TMPVAR2 (t1149);
     DECLARE_SIMD_TMPVAR2 (t1096);
     DECLARE_SIMD_TMPVAR2 (t1129);
     DECLARE_SIMD_TMPVAR2 (t1091);
     DECLARE_SIMD_TMPVAR2 (t1155);
     DECLARE_SIMD_TMPVAR2 (t1150);
     DECLARE_SIMD_TMPVAR2 (t1083);
     DECLARE_SIMD_TMPVAR2 (t1123);
     DECLARE_SIMD_TMPVAR2 (t1078);
     DECLARE_SIMD_TMPVAR2 (t1038);
     DECLARE_SIMD_TMPVAR2 (t1002);
     DECLARE_SIMD_TMPVAR2 (t1035);
     DECLARE_SIMD_TMPVAR2 (t1001);
     DECLARE_SIMD_TMPVAR2 (t1039);
     DECLARE_SIMD_TMPVAR2 (t1032);
     DECLARE_SIMD_TMPVAR2 (t1040);
     DECLARE_SIMD_TMPVAR2 (t1031);
     DECLARE_SIMD_TMPVAR2 (t1000);
     DECLARE_SIMD_TMPVAR2 (t1148);
     DECLARE_SIMD_TMPVAR2 (t1163);
     DECLARE_SIMD_TMPVAR2 (t1147);
     DECLARE_SIMD_TMPVAR2 (t1141);
     DECLARE_SIMD_TMPVAR2 (t1159);
     DECLARE_SIMD_TMPVAR2 (t1157);
     DECLARE_SIMD_TMPVAR2 (t1140);
     DECLARE_SIMD_TMPVAR2 (t1164);
     DECLARE_SIMD_TMPVAR2 (t1165);
     DECLARE_SIMD_TMPVAR2 (t1158);
     DECLARE_SIMD_TMPVAR2 (t1115);
     DECLARE_SIMD_TMPVAR2 (t1110);
     DECLARE_SIMD_TMPVAR2 (t1134);
     DECLARE_SIMD_TMPVAR2 (t1125);
     DECLARE_SIMD_TMPVAR2 (t1169);
     DECLARE_SIMD_TMPVAR2 (t1131);
     DECLARE_SIMD_TMPVAR2 (t1170);
     DECLARE_SIMD_TMPVAR2 (t1175);
     DECLARE_SIMD_TMPVAR2 (t1171);
     DECLARE_SIMD_TMPVAR2 (t1132);
     DECLARE_SIMD_TMPVAR2 (t1109);
     DECLARE_SIMD_TMPVAR2 (t1137);
     DECLARE_SIMD_TMPVAR2 (t1139);
     DECLARE_SIMD_TMPVAR2 (t1133);
     DECLARE_SIMD_TMPVAR2 (t1042);
     DECLARE_SIMD_TMPVAR2 (t1103);
     DECLARE_SIMD_TMPVAR2 (t1087);
     DECLARE_SIMD_TMPVAR2 (t1166);
     DECLARE_SIMD_TMPVAR2 (t1100);
     DECLARE_SIMD_TMPVAR2 (t1167);
     DECLARE_SIMD_TMPVAR2 (t1177);
     DECLARE_SIMD_TMPVAR2 (t1168);
     DECLARE_SIMD_TMPVAR2 (t1101);
     DECLARE_SIMD_TMPVAR2 (t1041);
     DECLARE_SIMD_TMPVAR2 (t1106);
     DECLARE_SIMD_TMPVAR2 (t1108);
     DECLARE_SIMD_TMPVAR2 (t1102);

     simd_ld2 (input[istride * 8], t1008);
     simd_ld2 (input[0], t1007);
     simd_add2 (t1007, t1008, t1005);
     simd_sub2 (t1007, t1008, t1049);
     simd_ld2 (input[istride * 12], t1010);
     simd_ld2 (input[istride * 4], t1009);
     simd_add2 (t1009, t1010, t1006);
     simd_sub2 (t1009, t1010, t1053);
     simd_add2 (t1005, t1006, t1003);
     simd_sub2 (t1005, t1006, t1143);
     simd_swapchsH2 (t1053, t1050);
     simd_add2 (t1050, t1049, t1112);
     simd_sub2 (t1049, t1050, t1044);
     simd_ld2 (input[istride * 10], t1014);
     simd_ld2 (input[istride * 2], t1013);
     simd_sub2 (t1013, t1014, t1069);
     simd_add2 (t1013, t1014, t1011);
     simd_ld2 (input[istride * 6], t1016);
     simd_ld2 (input[istride * 14], t1015);
     simd_sub2 (t1015, t1016, t1070);
     simd_add2 (t1015, t1016, t1012);
     simd_add2 (t1011, t1012, t1004);
     simd_sub2 (t1011, t1012, t1146);
     simd_swap2 (t1070, t1071);
     simd_fmca2 (PK1_000000000NK1_000000000, t1070, t1071, t1063);
     simd_swap2 (t1069, t1065);
     simd_fnmca2 (PK1_000000000NK1_000000000, t1069, t1065, t1062);
     simd_add2 (t1063, t1062, t1117);
     simd_sub2 (t1062, t1063, t1064);
     simd_ld2 (input[istride * 9], t1022);
     simd_ld2 (input[istride], t1021);
     simd_add2 (t1021, t1022, t1019);
     simd_sub2 (t1021, t1022, t1086);
     simd_ld2 (input[istride * 13], t1024);
     simd_ld2 (input[istride * 5], t1023);
     simd_add2 (t1023, t1024, t1020);
     simd_sub2 (t1023, t1024, t1082);
     simd_sub2 (t1019, t1020, t1151);
     simd_add2 (t1019, t1020, t1017);
     simd_ld2 (input[istride * 7], t1028);
     simd_ld2 (input[istride * 15], t1027);
     simd_add2 (t1027, t1028, t1025);
     simd_sub2 (t1027, t1028, t1095);
     simd_ld2 (input[istride * 11], t1030);
     simd_ld2 (input[istride * 3], t1029);
     simd_add2 (t1029, t1030, t1026);
     simd_sub2 (t1029, t1030, t1099);
     simd_sub2 (t1025, t1026, t1154);
     simd_add2 (t1025, t1026, t1018);
     simd_swapchsH2 (t1151, t1152);
     simd_add2 (t1152, t1151, t1149);
     simd_swapchsH2 (t1099, t1096);
     simd_add2 (t1096, t1095, t1129);
     simd_sub2 (t1095, t1096, t1091);
     simd_swapchsH2 (t1154, t1155);
     simd_sub2 (t1154, t1155, t1150);
     simd_swap2 (t1086, t1083);
     simd_fnmca2 (PK1_000000000NK1_000000000, t1082, t1083, t1123);
     simd_fmca2 (PK1_000000000NK1_000000000, t1082, t1083, t1078);
     simd_sub2 (t1017, t1018, t1038);
     simd_add2 (t1017, t1018, t1002);
     simd_sub2 (t1003, t1004, t1035);
     simd_add2 (t1003, t1004, t1001);
     simd_swapchsH2 (t1038, t1039);
     simd_add2 (t1039, t1035, t1032);
     simd_sub2 (t1035, t1039, t1040);
     simd_st2 (t1032, output[ostride * 4]);
     simd_st2 (t1040, output[ostride * 12]);
     simd_add2 (t1001, t1002, t1031);
     simd_sub2 (t1001, t1002, t1000);
     simd_st2 (t1031, output[0]);
     simd_st2 (t1000, output[ostride * 8]);
     simd_add2 (t1149, t1150, t1148);
     simd_sub2 (t1149, t1150, t1163);
     simd_swapchsH2 (t1146, t1147);
     simd_add2 (t1147, t1143, t1141);
     simd_sub2 (t1143, t1147, t1159);
     simd_fmca2 (PK707106781PK707106781, t1148, t1141, t1157);
     simd_fnmca2 (PK707106781PK707106781, t1148, t1141, t1140);
     simd_st2 (t1157, output[ostride * 2]);
     simd_st2 (t1140, output[ostride * 10]);
     simd_swapchsH2 (t1163, t1164);
     simd_fmca2 (PK707106781PK707106781, t1164, t1159, t1165);
     simd_fnmca2 (PK707106781PK707106781, t1164, t1159, t1158);
     simd_st2 (t1165, output[ostride * 6]);
     simd_st2 (t1158, output[ostride * 14]);
     simd_swap2 (t1117, t1115);
     simd_fmca2 (PK707106781PK707106781, t1115, t1112, t1110);
     simd_fnmca2 (PK707106781PK707106781, t1115, t1112, t1134);
     simd_swap2 (t1123, t1125);
     simd_fmca2 (PK414213562NK414213562, t1123, t1125, t1169);
     simd_swap2 (t1129, t1131);
     simd_fnmca2 (PK2_414213562NK2_414213562, t1129, t1131, t1170);
     simd_fmca2 (PK414213562NK414213562, t1170, t1169, t1175);
     simd_fnmca2 (PK2_414213562NK2_414213562, t1169, t1170, t1171);
     simd_fnmca2 (PK382683432NK382683432, t1171, t1110, t1132);
     simd_fmca2 (PK382683432NK382683432, t1171, t1110, t1109);
     simd_st2 (t1132, output[ostride]);
     simd_st2 (t1109, output[ostride * 9]);
     simd_swapchsH2 (t1175, t1137);
     simd_fmca2 (PK923879532PK923879532, t1137, t1134, t1139);
     simd_fnmca2 (PK923879532PK923879532, t1137, t1134, t1133);
     simd_st2 (t1139, output[ostride * 5]);
     simd_st2 (t1133, output[ostride * 13]);
     simd_fmca2 (PK707106781NK707106781, t1064, t1044, t1042);
     simd_fnmca2 (PK707106781NK707106781, t1064, t1044, t1103);
     simd_swap2 (t1078, t1087);
     simd_fmca2 (PK2_414213562NK2_414213562, t1078, t1087, t1166);
     simd_swap2 (t1091, t1100);
     simd_fnmca2 (PK414213562NK414213562, t1091, t1100, t1167);
     simd_fmca2 (PK2_414213562NK2_414213562, t1167, t1166, t1177);
     simd_fnmca2 (PK414213562NK414213562, t1166, t1167, t1168);
     simd_fnmca2 (PK923879532NK923879532, t1168, t1042, t1101);
     simd_fmca2 (PK923879532NK923879532, t1168, t1042, t1041);
     simd_st2 (t1101, output[ostride * 3]);
     simd_st2 (t1041, output[ostride * 11]);
     simd_swapchsH2 (t1177, t1106);
     simd_fmca2 (PK382683432PK382683432, t1106, t1103, t1108);
     simd_fnmca2 (PK382683432PK382683432, t1106, t1103, t1102);
     simd_st2 (t1108, output[ostride * 7]);
     simd_st2 (t1102, output[ostride * 15]);
}


fftw_codelet_desc fftw_no_twiddle_16_desc = {
     "fftw_no_twiddle_16",
     (void (*)()) fftw_no_twiddle_16,
     16,
     FFTW_FORWARD,
     FFTW_NOTW,
     353,
     0,
     (const int *) 0,
};
