/*
 * Copyright (c) 1997-1999 Massachusetts Institute of Technology
 * Copyright (c) 2000-2002 Stefan Kral
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

/* This file was automatically generated --- DO NOT EDIT */
/* Generated on Tue Feb 19 15:28:06 CET 2002 */

#include <fftw-int.h>
#include <fftw.h>



DECLARE_SIMD_CONST2 (PK1_000000000NK1_000000000, +1.0000000000000000000000000,
		     -1.0000000000000000000000000);
DECLARE_SIMD_CONST2 (PK707106781PK707106781, +0.7071067811865475244008444,
		     +0.7071067811865475244008444);
DECLARE_SIMD_CONST2 (PK2_414213562PK2_414213562, +2.4142135623730950488016887,
		     +2.4142135623730950488016887);
DECLARE_SIMD_CONST2 (PK414213562PK414213562, +0.4142135623730950488016887,
		     +0.4142135623730950488016887);
DECLARE_SIMD_CONST2 (PK923879532PK923879532, +0.9238795325112867561281832,
		     +0.9238795325112867561281832);
DECLARE_SIMD_CONST2 (PK382683432PK382683432, +0.3826834323650897717284600,
		     +0.3826834323650897717284600);

void
fftwi_twiddle_16 (fftw_complex * ioC, const fftw_complex * twC, int iostride,
		  int m, int dist)
{
     fftw_simd2 *inout = (fftw_simd2 *) ioC;
     const fftw_simd2 *W = (const fftw_simd2 *) twC;

     for (; m > 0; m--, inout += dist, W += 15)
       {
	    DECLARE_SIMD_TMPVAR2 (t1180);
	    DECLARE_SIMD_TMPVAR2 (t1262);
	    DECLARE_SIMD_TMPVAR2 (t1179);
	    DECLARE_SIMD_TMPVAR2 (t1177);
	    DECLARE_SIMD_TMPVAR2 (t1260);
	    DECLARE_SIMD_TMPVAR2 (t1183);
	    DECLARE_SIMD_TMPVAR2 (t1182);
	    DECLARE_SIMD_TMPVAR2 (t1181);
	    DECLARE_SIMD_TMPVAR2 (t1259);
	    DECLARE_SIMD_TMPVAR2 (t1178);
	    DECLARE_SIMD_TMPVAR2 (t1419);
	    DECLARE_SIMD_TMPVAR2 (t1418);
	    DECLARE_SIMD_TMPVAR2 (t1161);
	    DECLARE_SIMD_TMPVAR2 (t1427);
	    DECLARE_SIMD_TMPVAR2 (t1426);
	    DECLARE_SIMD_TMPVAR2 (t1251);
	    DECLARE_SIMD_TMPVAR2 (t1245);
	    DECLARE_SIMD_TMPVAR2 (t1294);
	    DECLARE_SIMD_TMPVAR2 (t1244);
	    DECLARE_SIMD_TMPVAR2 (t1242);
	    DECLARE_SIMD_TMPVAR2 (t1292);
	    DECLARE_SIMD_TMPVAR2 (t1248);
	    DECLARE_SIMD_TMPVAR2 (t1247);
	    DECLARE_SIMD_TMPVAR2 (t1246);
	    DECLARE_SIMD_TMPVAR2 (t1291);
	    DECLARE_SIMD_TMPVAR2 (t1243);
	    DECLARE_SIMD_TMPVAR2 (t1425);
	    DECLARE_SIMD_TMPVAR2 (t1424);
	    DECLARE_SIMD_TMPVAR2 (t1206);
	    DECLARE_SIMD_TMPVAR2 (t1433);
	    DECLARE_SIMD_TMPVAR2 (t1432);
	    DECLARE_SIMD_TMPVAR2 (t1274);
	    DECLARE_SIMD_TMPVAR2 (t1201);
	    DECLARE_SIMD_TMPVAR2 (t1272);
	    DECLARE_SIMD_TMPVAR2 (t1200);
	    DECLARE_SIMD_TMPVAR2 (t1198);
	    DECLARE_SIMD_TMPVAR2 (t1270);
	    DECLARE_SIMD_TMPVAR2 (t1204);
	    DECLARE_SIMD_TMPVAR2 (t1203);
	    DECLARE_SIMD_TMPVAR2 (t1202);
	    DECLARE_SIMD_TMPVAR2 (t1269);
	    DECLARE_SIMD_TMPVAR2 (t1199);
	    DECLARE_SIMD_TMPVAR2 (t1421);
	    DECLARE_SIMD_TMPVAR2 (t1420);
	    DECLARE_SIMD_TMPVAR2 (t1162);
	    DECLARE_SIMD_TMPVAR2 (t1429);
	    DECLARE_SIMD_TMPVAR2 (t1428);
	    DECLARE_SIMD_TMPVAR2 (t1252);
	    DECLARE_SIMD_TMPVAR2 (t1224);
	    DECLARE_SIMD_TMPVAR2 (t1284);
	    DECLARE_SIMD_TMPVAR2 (t1223);
	    DECLARE_SIMD_TMPVAR2 (t1221);
	    DECLARE_SIMD_TMPVAR2 (t1282);
	    DECLARE_SIMD_TMPVAR2 (t1227);
	    DECLARE_SIMD_TMPVAR2 (t1226);
	    DECLARE_SIMD_TMPVAR2 (t1225);
	    DECLARE_SIMD_TMPVAR2 (t1281);
	    DECLARE_SIMD_TMPVAR2 (t1222);
	    DECLARE_SIMD_TMPVAR2 (t1423);
	    DECLARE_SIMD_TMPVAR2 (t1422);
	    DECLARE_SIMD_TMPVAR2 (t1205);
	    DECLARE_SIMD_TMPVAR2 (t1431);
	    DECLARE_SIMD_TMPVAR2 (t1430);
	    DECLARE_SIMD_TMPVAR2 (t1273);
	    DECLARE_SIMD_TMPVAR2 (t1249);
	    DECLARE_SIMD_TMPVAR2 (t1326);
	    DECLARE_SIMD_TMPVAR2 (t1250);
	    DECLARE_SIMD_TMPVAR2 (t1321);
	    DECLARE_SIMD_TMPVAR2 (t1387);
	    DECLARE_SIMD_TMPVAR2 (t1158);
	    DECLARE_SIMD_TMPVAR2 (t1159);
	    DECLARE_SIMD_TMPVAR2 (t1324);
	    DECLARE_SIMD_TMPVAR2 (t1160);
	    DECLARE_SIMD_TMPVAR2 (t1330);
	    DECLARE_SIMD_TMPVAR2 (t1384);
	    DECLARE_SIMD_TMPVAR2 (t1157);
	    DECLARE_SIMD_TMPVAR2 (t1057);
	    DECLARE_SIMD_TMPVAR2 (t1058);
	    DECLARE_SIMD_TMPVAR2 (t1056);
	    DECLARE_SIMD_TMPVAR2 (t1054);
	    DECLARE_SIMD_TMPVAR2 (t1055);
	    DECLARE_SIMD_TMPVAR2 (t1405);
	    DECLARE_SIMD_TMPVAR2 (t1404);
	    DECLARE_SIMD_TMPVAR2 (t1044);
	    DECLARE_SIMD_TMPVAR2 (t1073);
	    DECLARE_SIMD_TMPVAR2 (t1074);
	    DECLARE_SIMD_TMPVAR2 (t1072);
	    DECLARE_SIMD_TMPVAR2 (t1070);
	    DECLARE_SIMD_TMPVAR2 (t1071);
	    DECLARE_SIMD_TMPVAR2 (t1087);
	    DECLARE_SIMD_TMPVAR2 (t1088);
	    DECLARE_SIMD_TMPVAR2 (t1086);
	    DECLARE_SIMD_TMPVAR2 (t1084);
	    DECLARE_SIMD_TMPVAR2 (t1085);
	    DECLARE_SIMD_TMPVAR2 (t1407);
	    DECLARE_SIMD_TMPVAR2 (t1406);
	    DECLARE_SIMD_TMPVAR2 (t1059);
	    DECLARE_SIMD_TMPVAR2 (t1409);
	    DECLARE_SIMD_TMPVAR2 (t1408);
	    DECLARE_SIMD_TMPVAR2 (t1060);
	    DECLARE_SIMD_TMPVAR2 (t1305);
	    DECLARE_SIMD_TMPVAR2 (t1042);
	    DECLARE_SIMD_TMPVAR2 (t1110);
	    DECLARE_SIMD_TMPVAR2 (t1146);
	    DECLARE_SIMD_TMPVAR2 (t1109);
	    DECLARE_SIMD_TMPVAR2 (t1107);
	    DECLARE_SIMD_TMPVAR2 (t1144);
	    DECLARE_SIMD_TMPVAR2 (t1113);
	    DECLARE_SIMD_TMPVAR2 (t1112);
	    DECLARE_SIMD_TMPVAR2 (t1111);
	    DECLARE_SIMD_TMPVAR2 (t1143);
	    DECLARE_SIMD_TMPVAR2 (t1108);
	    DECLARE_SIMD_TMPVAR2 (t1411);
	    DECLARE_SIMD_TMPVAR2 (t1410);
	    DECLARE_SIMD_TMPVAR2 (t1091);
	    DECLARE_SIMD_TMPVAR2 (t1415);
	    DECLARE_SIMD_TMPVAR2 (t1414);
	    DECLARE_SIMD_TMPVAR2 (t1135);
	    DECLARE_SIMD_TMPVAR2 (t1131);
	    DECLARE_SIMD_TMPVAR2 (t1156);
	    DECLARE_SIMD_TMPVAR2 (t1130);
	    DECLARE_SIMD_TMPVAR2 (t1128);
	    DECLARE_SIMD_TMPVAR2 (t1154);
	    DECLARE_SIMD_TMPVAR2 (t1134);
	    DECLARE_SIMD_TMPVAR2 (t1133);
	    DECLARE_SIMD_TMPVAR2 (t1132);
	    DECLARE_SIMD_TMPVAR2 (t1153);
	    DECLARE_SIMD_TMPVAR2 (t1129);
	    DECLARE_SIMD_TMPVAR2 (t1413);
	    DECLARE_SIMD_TMPVAR2 (t1412);
	    DECLARE_SIMD_TMPVAR2 (t1092);
	    DECLARE_SIMD_TMPVAR2 (t1417);
	    DECLARE_SIMD_TMPVAR2 (t1416);
	    DECLARE_SIMD_TMPVAR2 (t1136);
	    DECLARE_SIMD_TMPVAR2 (t1309);
	    DECLARE_SIMD_TMPVAR2 (t1089);
	    DECLARE_SIMD_TMPVAR2 (t1312);
	    DECLARE_SIMD_TMPVAR2 (t1090);
	    DECLARE_SIMD_TMPVAR2 (t1389);
	    DECLARE_SIMD_TMPVAR2 (t1383);
	    DECLARE_SIMD_TMPVAR2 (t1385);
	    DECLARE_SIMD_TMPVAR2 (t1382);
	    DECLARE_SIMD_TMPVAR2 (t1381);
	    DECLARE_SIMD_TMPVAR2 (t1396);
	    DECLARE_SIMD_TMPVAR2 (t1402);
	    DECLARE_SIMD_TMPVAR2 (t1038);
	    DECLARE_SIMD_TMPVAR2 (t1040);
	    DECLARE_SIMD_TMPVAR2 (t1380);
	    DECLARE_SIMD_TMPVAR2 (t1043);
	    DECLARE_SIMD_TMPVAR2 (t1041);
	    DECLARE_SIMD_TMPVAR2 (t1301);
	    DECLARE_SIMD_TMPVAR2 (t1039);
	    DECLARE_SIMD_TMPVAR2 (t1377);
	    DECLARE_SIMD_TMPVAR2 (t1037);
	    DECLARE_SIMD_TMPVAR2 (t1399);
	    DECLARE_SIMD_TMPVAR2 (t1378);
	    DECLARE_SIMD_TMPVAR2 (t1375);
	    DECLARE_SIMD_TMPVAR2 (t1392);
	    DECLARE_SIMD_TMPVAR2 (t1295);
	    DECLARE_SIMD_TMPVAR2 (t1036);
	    DECLARE_SIMD_TMPVAR2 (t1400);
	    DECLARE_SIMD_TMPVAR2 (t1403);
	    DECLARE_SIMD_TMPVAR2 (t1398);
	    DECLARE_SIMD_TMPVAR2 (t1390);
	    DECLARE_SIMD_TMPVAR2 (t1374);
	    DECLARE_SIMD_TMPVAR2 (t1394);
	    DECLARE_SIMD_TMPVAR2 (t1397);
	    DECLARE_SIMD_TMPVAR2 (t1391);
	    DECLARE_SIMD_TMPVAR2 (t1320);
	    DECLARE_SIMD_TMPVAR2 (t1357);
	    DECLARE_SIMD_TMPVAR2 (t1319);
	    DECLARE_SIMD_TMPVAR2 (t1327);
	    DECLARE_SIMD_TMPVAR2 (t1359);
	    DECLARE_SIMD_TMPVAR2 (t1325);
	    DECLARE_SIMD_TMPVAR2 (t1466);
	    DECLARE_SIMD_TMPVAR2 (t1478);
	    DECLARE_SIMD_TMPVAR2 (t1435);
	    DECLARE_SIMD_TMPVAR2 (t1467);
	    DECLARE_SIMD_TMPVAR2 (t1468);
	    DECLARE_SIMD_TMPVAR2 (t1455);
	    DECLARE_SIMD_TMPVAR2 (t1479);
	    DECLARE_SIMD_TMPVAR2 (t1434);
	    DECLARE_SIMD_TMPVAR2 (t1456);
	    DECLARE_SIMD_TMPVAR2 (t1457);
	    DECLARE_SIMD_TMPVAR2 (t1302);
	    DECLARE_SIMD_TMPVAR2 (t1299);
	    DECLARE_SIMD_TMPVAR2 (t1347);
	    DECLARE_SIMD_TMPVAR2 (t1310);
	    DECLARE_SIMD_TMPVAR2 (t1314);
	    DECLARE_SIMD_TMPVAR2 (t1307);
	    DECLARE_SIMD_TMPVAR2 (t1308);
	    DECLARE_SIMD_TMPVAR2 (t1306);
	    DECLARE_SIMD_TMPVAR2 (t1352);
	    DECLARE_SIMD_TMPVAR2 (t1339);
	    DECLARE_SIMD_TMPVAR2 (t1297);
	    DECLARE_SIMD_TMPVAR2 (t1342);
	    DECLARE_SIMD_TMPVAR2 (t1343);
	    DECLARE_SIMD_TMPVAR2 (t1338);
	    DECLARE_SIMD_TMPVAR2 (t1337);
	    DECLARE_SIMD_TMPVAR2 (t1296);
	    DECLARE_SIMD_TMPVAR2 (t1350);
	    DECLARE_SIMD_TMPVAR2 (t1369);
	    DECLARE_SIMD_TMPVAR2 (t1345);
	    DECLARE_SIMD_TMPVAR2 (t1372);
	    DECLARE_SIMD_TMPVAR2 (t1373);
	    DECLARE_SIMD_TMPVAR2 (t1368);
	    DECLARE_SIMD_TMPVAR2 (t1367);
	    DECLARE_SIMD_TMPVAR2 (t1344);

	    simd_ld2 (inout[iostride], t1180);
	    simd_swap2 (t1180, t1262);
	    simd_ld2 (W[0], t1179);
	    simd_mul2 (t1179, t1180, t1177);
	    simd_mul2 (t1179, t1262, t1260);
	    simd_ld2 (inout[iostride * 15], t1183);
	    simd_swap2 (t1183, t1182);
	    simd_ld2 (W[14], t1181);
	    simd_mul2 (t1181, t1183, t1259);
	    simd_mul2 (t1181, t1182, t1178);
	    simd_unpckL2 (t1177, t1178, t1419);
	    simd_unpckH2 (t1177, t1178, t1418);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1418, t1419, t1161);
	    simd_unpckL2 (t1259, t1260, t1427);
	    simd_unpckH2 (t1259, t1260, t1426);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1426, t1427, t1251);
	    simd_ld2 (inout[iostride * 13], t1245);
	    simd_swap2 (t1245, t1294);
	    simd_ld2 (W[12], t1244);
	    simd_mul2 (t1244, t1245, t1242);
	    simd_mul2 (t1244, t1294, t1292);
	    simd_ld2 (inout[iostride * 11], t1248);
	    simd_swap2 (t1248, t1247);
	    simd_ld2 (W[10], t1246);
	    simd_mul2 (t1246, t1248, t1291);
	    simd_mul2 (t1246, t1247, t1243);
	    simd_unpckL2 (t1242, t1243, t1425);
	    simd_unpckH2 (t1242, t1243, t1424);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1424, t1425, t1206);
	    simd_unpckL2 (t1291, t1292, t1433);
	    simd_unpckH2 (t1291, t1292, t1432);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1432, t1433, t1274);
	    simd_ld2 (inout[iostride * 9], t1201);
	    simd_swap2 (t1201, t1272);
	    simd_ld2 (W[8], t1200);
	    simd_mul2 (t1200, t1201, t1198);
	    simd_mul2 (t1200, t1272, t1270);
	    simd_ld2 (inout[iostride * 7], t1204);
	    simd_swap2 (t1204, t1203);
	    simd_ld2 (W[6], t1202);
	    simd_mul2 (t1202, t1204, t1269);
	    simd_mul2 (t1202, t1203, t1199);
	    simd_unpckL2 (t1198, t1199, t1421);
	    simd_unpckH2 (t1198, t1199, t1420);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1420, t1421, t1162);
	    simd_unpckL2 (t1269, t1270, t1429);
	    simd_unpckH2 (t1269, t1270, t1428);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1428, t1429, t1252);
	    simd_ld2 (inout[iostride * 5], t1224);
	    simd_swap2 (t1224, t1284);
	    simd_ld2 (W[4], t1223);
	    simd_mul2 (t1223, t1224, t1221);
	    simd_mul2 (t1223, t1284, t1282);
	    simd_ld2 (inout[iostride * 3], t1227);
	    simd_swap2 (t1227, t1226);
	    simd_ld2 (W[2], t1225);
	    simd_mul2 (t1225, t1227, t1281);
	    simd_mul2 (t1225, t1226, t1222);
	    simd_unpckL2 (t1221, t1222, t1423);
	    simd_unpckH2 (t1221, t1222, t1422);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1422, t1423, t1205);
	    simd_unpckL2 (t1281, t1282, t1431);
	    simd_unpckH2 (t1281, t1282, t1430);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1430, t1431, t1273);
	    simd_add2 (t1251, t1252, t1249);
	    simd_sub2 (t1251, t1252, t1326);
	    simd_add2 (t1273, t1274, t1250);
	    simd_sub2 (t1273, t1274, t1321);
	    simd_sub2 (t1249, t1250, t1387);
	    simd_add2 (t1249, t1250, t1158);
	    simd_add2 (t1161, t1162, t1159);
	    simd_sub2 (t1161, t1162, t1324);
	    simd_add2 (t1205, t1206, t1160);
	    simd_sub2 (t1205, t1206, t1330);
	    simd_sub2 (t1159, t1160, t1384);
	    simd_add2 (t1159, t1160, t1157);
	    simd_ld2 (inout[iostride * 8], t1057);
	    simd_swap2 (t1057, t1058);
	    simd_ld2 (W[7], t1056);
	    simd_mul2 (t1056, t1057, t1054);
	    simd_mul2 (t1056, t1058, t1055);
	    simd_unpckL2 (t1054, t1055, t1405);
	    simd_unpckH2 (t1054, t1055, t1404);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1404, t1405, t1044);
	    simd_ld2 (inout[iostride * 4], t1073);
	    simd_swap2 (t1073, t1074);
	    simd_ld2 (W[3], t1072);
	    simd_mul2 (t1072, t1073, t1070);
	    simd_mul2 (t1072, t1074, t1071);
	    simd_ld2 (inout[iostride * 12], t1087);
	    simd_swap2 (t1087, t1088);
	    simd_ld2 (W[11], t1086);
	    simd_mul2 (t1086, t1087, t1084);
	    simd_mul2 (t1086, t1088, t1085);
	    simd_unpckL2 (t1070, t1071, t1407);
	    simd_unpckH2 (t1070, t1071, t1406);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1406, t1407, t1059);
	    simd_unpckL2 (t1084, t1085, t1409);
	    simd_unpckH2 (t1084, t1085, t1408);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1408, t1409, t1060);
	    simd_sub2 (t1059, t1060, t1305);
	    simd_add2 (t1059, t1060, t1042);
	    simd_ld2 (inout[iostride * 2], t1110);
	    simd_swap2 (t1110, t1146);
	    simd_ld2 (W[1], t1109);
	    simd_mul2 (t1109, t1110, t1107);
	    simd_mul2 (t1109, t1146, t1144);
	    simd_ld2 (inout[iostride * 14], t1113);
	    simd_swap2 (t1113, t1112);
	    simd_ld2 (W[13], t1111);
	    simd_mul2 (t1111, t1113, t1143);
	    simd_mul2 (t1111, t1112, t1108);
	    simd_unpckL2 (t1107, t1108, t1411);
	    simd_unpckH2 (t1107, t1108, t1410);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1410, t1411, t1091);
	    simd_unpckL2 (t1143, t1144, t1415);
	    simd_unpckH2 (t1143, t1144, t1414);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1414, t1415, t1135);
	    simd_ld2 (inout[iostride * 10], t1131);
	    simd_swap2 (t1131, t1156);
	    simd_ld2 (W[9], t1130);
	    simd_mul2 (t1130, t1131, t1128);
	    simd_mul2 (t1130, t1156, t1154);
	    simd_ld2 (inout[iostride * 6], t1134);
	    simd_swap2 (t1134, t1133);
	    simd_ld2 (W[5], t1132);
	    simd_mul2 (t1132, t1134, t1153);
	    simd_mul2 (t1132, t1133, t1129);
	    simd_unpckL2 (t1128, t1129, t1413);
	    simd_unpckH2 (t1128, t1129, t1412);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1412, t1413, t1092);
	    simd_unpckL2 (t1153, t1154, t1417);
	    simd_unpckH2 (t1153, t1154, t1416);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1416, t1417, t1136);
	    simd_sub2 (t1091, t1092, t1309);
	    simd_add2 (t1091, t1092, t1089);
	    simd_sub2 (t1135, t1136, t1312);
	    simd_add2 (t1135, t1136, t1090);
	    simd_swap2 (t1384, t1389);
	    simd_add2 (t1387, t1389, t1383);
	    simd_swap2 (t1387, t1385);
	    simd_sub2 (t1384, t1385, t1382);
	    simd_add2 (t1382, t1383, t1381);
	    simd_sub2 (t1382, t1383, t1396);
	    simd_sub2 (t1157, t1158, t1402);
	    simd_add2 (t1157, t1158, t1038);
	    simd_add2 (t1089, t1090, t1040);
	    simd_sub2 (t1089, t1090, t1380);
	    simd_ld2 (inout[0], t1043);
	    simd_add2 (t1043, t1044, t1041);
	    simd_sub2 (t1043, t1044, t1301);
	    simd_add2 (t1041, t1042, t1039);
	    simd_sub2 (t1041, t1042, t1377);
	    simd_add2 (t1039, t1040, t1037);
	    simd_sub2 (t1039, t1040, t1399);
	    simd_swap2 (t1380, t1378);
	    simd_add2 (t1377, t1378, t1375);
	    simd_sub2 (t1377, t1378, t1392);
	    simd_add2 (t1037, t1038, t1295);
	    simd_sub2 (t1037, t1038, t1036);
	    simd_st2 (t1295, inout[0]);
	    simd_st2 (t1036, inout[iostride * 8]);
	    simd_swap2 (t1402, t1400);
	    simd_add2 (t1399, t1400, t1403);
	    simd_sub2 (t1399, t1400, t1398);
	    simd_st2 (t1403, inout[iostride * 4]);
	    simd_st2 (t1398, inout[iostride * 12]);
	    simd_fmca2 (PK707106781PK707106781, t1381, t1375, t1390);
	    simd_fnmca2 (PK707106781PK707106781, t1381, t1375, t1374);
	    simd_st2 (t1390, inout[iostride * 2]);
	    simd_st2 (t1374, inout[iostride * 10]);
	    simd_swap2 (t1396, t1394);
	    simd_fmca2 (PK707106781PK707106781, t1394, t1392, t1397);
	    simd_fnmca2 (PK707106781PK707106781, t1394, t1392, t1391);
	    simd_st2 (t1397, inout[iostride * 6]);
	    simd_st2 (t1391, inout[iostride * 14]);
	    simd_swap2 (t1324, t1320);
	    simd_fnmca2 (PK1_000000000NK1_000000000, t1321, t1320, t1357);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1321, t1320, t1319);
	    simd_swapchsH2 (t1330, t1327);
	    simd_add2 (t1327, t1326, t1359);
	    simd_sub2 (t1326, t1327, t1325);
	    simd_fnmca2 (PK2_414213562PK2_414213562, t1359, t1357, t1466);
	    simd_fmca2 (PK414213562PK414213562, t1359, t1357, t1478);
	    simd_swap2 (t1478, t1435);
	    simd_fmca2 (PK2_414213562PK2_414213562, t1435, t1466, t1467);
	    simd_fnmca2 (PK2_414213562PK2_414213562, t1435, t1466, t1468);
	    simd_fnmca2 (PK414213562PK414213562, t1325, t1319, t1455);
	    simd_fmca2 (PK2_414213562PK2_414213562, t1325, t1319, t1479);
	    simd_swap2 (t1479, t1434);
	    simd_fmca2 (PK414213562PK414213562, t1434, t1455, t1456);
	    simd_fnmca2 (PK414213562PK414213562, t1434, t1455, t1457);
	    simd_swapchsH2 (t1305, t1302);
	    simd_sub2 (t1301, t1302, t1299);
	    simd_add2 (t1302, t1301, t1347);
	    simd_swap2 (t1312, t1310);
	    simd_swap2 (t1309, t1314);
	    simd_sub2 (t1309, t1310, t1307);
	    simd_add2 (t1312, t1314, t1308);
	    simd_add2 (t1307, t1308, t1306);
	    simd_sub2 (t1307, t1308, t1352);
	    simd_fmca2 (PK707106781PK707106781, t1306, t1299, t1339);
	    simd_fnmca2 (PK707106781PK707106781, t1306, t1299, t1297);
	    simd_swap2 (t1456, t1342);
	    simd_fmca2 (PK923879532PK923879532, t1342, t1339, t1343);
	    simd_fnmca2 (PK923879532PK923879532, t1342, t1339, t1338);
	    simd_st2 (t1343, inout[iostride]);
	    simd_st2 (t1338, inout[iostride * 9]);
	    simd_fmca2 (PK923879532PK923879532, t1457, t1297, t1337);
	    simd_fnmca2 (PK923879532PK923879532, t1457, t1297, t1296);
	    simd_st2 (t1337, inout[iostride * 5]);
	    simd_st2 (t1296, inout[iostride * 13]);
	    simd_swap2 (t1352, t1350);
	    simd_fmca2 (PK707106781PK707106781, t1350, t1347, t1369);
	    simd_fnmca2 (PK707106781PK707106781, t1350, t1347, t1345);
	    simd_swap2 (t1467, t1372);
	    simd_fmca2 (PK382683432PK382683432, t1372, t1369, t1373);
	    simd_fnmca2 (PK382683432PK382683432, t1372, t1369, t1368);
	    simd_st2 (t1373, inout[iostride * 3]);
	    simd_st2 (t1368, inout[iostride * 11]);
	    simd_fmca2 (PK382683432PK382683432, t1468, t1345, t1367);
	    simd_fnmca2 (PK382683432PK382683432, t1468, t1345, t1344);
	    simd_st2 (t1367, inout[iostride * 7]);
	    simd_st2 (t1344, inout[iostride * 15]);
       }
}


static const int twiddle_order[] =
     { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };

fftw_codelet_desc fftwi_twiddle_16_desc = {
     "fftwi_twiddle_16",
     (void (*)()) fftwi_twiddle_16,
     16,
     FFTW_BACKWARD,
     FFTW_TWIDDLE,
     363,
     15,
     twiddle_order,
};
