/*
 * Copyright (c) 1997-1999 Massachusetts Institute of Technology
 * Copyright (c) 2000-2002 Stefan Kral
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

/* This file was automatically generated --- DO NOT EDIT */
/* Generated on Tue Feb 19 15:11:21 CET 2002 */

#include <fftw-int.h>
#include <fftw.h>



DECLARE_SIMD_CONST2 (PK1_000000000NK1_000000000, +1.0000000000000000000000000,
		     -1.0000000000000000000000000);
DECLARE_SIMD_CONST2 (PK1_618033988PK1_618033988, +1.6180339887498948482045868,
		     +1.6180339887498948482045868);
DECLARE_SIMD_CONST2 (PK618033988PK618033988, +0.6180339887498948482045868,
		     +0.6180339887498948482045868);
DECLARE_SIMD_CONST2 (PK250000000PK250000000, +0.2500000000000000000000000,
		     +0.2500000000000000000000000);
DECLARE_SIMD_CONST2 (PK559016994PK559016994, +0.5590169943749474241022934,
		     +0.5590169943749474241022934);
DECLARE_SIMD_CONST2 (PK951056516PK951056516, +0.9510565162951535721164393,
		     +0.9510565162951535721164393);
DECLARE_SIMD_CONST2 (PK587785252PK587785252, +0.5877852522924731291687060,
		     +0.5877852522924731291687060);

void
fftw_twiddle_10 (fftw_complex * ioC, const fftw_complex * twC, int iostride,
		 int m, int dist)
{
     fftw_simd2 *inout = (fftw_simd2 *) ioC;
     const fftw_simd2 *W = (const fftw_simd2 *) twC;

     for (; m > 0; m--, inout += dist, W += 9)
       {
	    DECLARE_SIMD_TMPVAR2 (t1031);
	    DECLARE_SIMD_TMPVAR2 (t1032);
	    DECLARE_SIMD_TMPVAR2 (t1030);
	    DECLARE_SIMD_TMPVAR2 (t1028);
	    DECLARE_SIMD_TMPVAR2 (t1029);
	    DECLARE_SIMD_TMPVAR2 (t1221);
	    DECLARE_SIMD_TMPVAR2 (t1220);
	    DECLARE_SIMD_TMPVAR2 (t1018);
	    DECLARE_SIMD_TMPVAR2 (t1143);
	    DECLARE_SIMD_TMPVAR2 (t1144);
	    DECLARE_SIMD_TMPVAR2 (t1142);
	    DECLARE_SIMD_TMPVAR2 (t1140);
	    DECLARE_SIMD_TMPVAR2 (t1141);
	    DECLARE_SIMD_TMPVAR2 (t1157);
	    DECLARE_SIMD_TMPVAR2 (t1158);
	    DECLARE_SIMD_TMPVAR2 (t1156);
	    DECLARE_SIMD_TMPVAR2 (t1154);
	    DECLARE_SIMD_TMPVAR2 (t1155);
	    DECLARE_SIMD_TMPVAR2 (t1235);
	    DECLARE_SIMD_TMPVAR2 (t1234);
	    DECLARE_SIMD_TMPVAR2 (t1129);
	    DECLARE_SIMD_TMPVAR2 (t1237);
	    DECLARE_SIMD_TMPVAR2 (t1236);
	    DECLARE_SIMD_TMPVAR2 (t1130);
	    DECLARE_SIMD_TMPVAR2 (t1167);
	    DECLARE_SIMD_TMPVAR2 (t1098);
	    DECLARE_SIMD_TMPVAR2 (t1113);
	    DECLARE_SIMD_TMPVAR2 (t1114);
	    DECLARE_SIMD_TMPVAR2 (t1112);
	    DECLARE_SIMD_TMPVAR2 (t1110);
	    DECLARE_SIMD_TMPVAR2 (t1111);
	    DECLARE_SIMD_TMPVAR2 (t1127);
	    DECLARE_SIMD_TMPVAR2 (t1128);
	    DECLARE_SIMD_TMPVAR2 (t1126);
	    DECLARE_SIMD_TMPVAR2 (t1124);
	    DECLARE_SIMD_TMPVAR2 (t1125);
	    DECLARE_SIMD_TMPVAR2 (t1231);
	    DECLARE_SIMD_TMPVAR2 (t1230);
	    DECLARE_SIMD_TMPVAR2 (t1099);
	    DECLARE_SIMD_TMPVAR2 (t1233);
	    DECLARE_SIMD_TMPVAR2 (t1232);
	    DECLARE_SIMD_TMPVAR2 (t1100);
	    DECLARE_SIMD_TMPVAR2 (t1166);
	    DECLARE_SIMD_TMPVAR2 (t1097);
	    DECLARE_SIMD_TMPVAR2 (t1081);
	    DECLARE_SIMD_TMPVAR2 (t1082);
	    DECLARE_SIMD_TMPVAR2 (t1080);
	    DECLARE_SIMD_TMPVAR2 (t1078);
	    DECLARE_SIMD_TMPVAR2 (t1079);
	    DECLARE_SIMD_TMPVAR2 (t1095);
	    DECLARE_SIMD_TMPVAR2 (t1096);
	    DECLARE_SIMD_TMPVAR2 (t1094);
	    DECLARE_SIMD_TMPVAR2 (t1092);
	    DECLARE_SIMD_TMPVAR2 (t1093);
	    DECLARE_SIMD_TMPVAR2 (t1227);
	    DECLARE_SIMD_TMPVAR2 (t1226);
	    DECLARE_SIMD_TMPVAR2 (t1067);
	    DECLARE_SIMD_TMPVAR2 (t1229);
	    DECLARE_SIMD_TMPVAR2 (t1228);
	    DECLARE_SIMD_TMPVAR2 (t1068);
	    DECLARE_SIMD_TMPVAR2 (t1165);
	    DECLARE_SIMD_TMPVAR2 (t1036);
	    DECLARE_SIMD_TMPVAR2 (t1051);
	    DECLARE_SIMD_TMPVAR2 (t1052);
	    DECLARE_SIMD_TMPVAR2 (t1050);
	    DECLARE_SIMD_TMPVAR2 (t1048);
	    DECLARE_SIMD_TMPVAR2 (t1049);
	    DECLARE_SIMD_TMPVAR2 (t1065);
	    DECLARE_SIMD_TMPVAR2 (t1066);
	    DECLARE_SIMD_TMPVAR2 (t1064);
	    DECLARE_SIMD_TMPVAR2 (t1062);
	    DECLARE_SIMD_TMPVAR2 (t1063);
	    DECLARE_SIMD_TMPVAR2 (t1223);
	    DECLARE_SIMD_TMPVAR2 (t1222);
	    DECLARE_SIMD_TMPVAR2 (t1037);
	    DECLARE_SIMD_TMPVAR2 (t1225);
	    DECLARE_SIMD_TMPVAR2 (t1224);
	    DECLARE_SIMD_TMPVAR2 (t1038);
	    DECLARE_SIMD_TMPVAR2 (t1164);
	    DECLARE_SIMD_TMPVAR2 (t1035);
	    DECLARE_SIMD_TMPVAR2 (t1180);
	    DECLARE_SIMD_TMPVAR2 (t1033);
	    DECLARE_SIMD_TMPVAR2 (t1183);
	    DECLARE_SIMD_TMPVAR2 (t1034);
	    DECLARE_SIMD_TMPVAR2 (t1264);
	    DECLARE_SIMD_TMPVAR2 (t1265);
	    DECLARE_SIMD_TMPVAR2 (t1017);
	    DECLARE_SIMD_TMPVAR2 (t1015);
	    DECLARE_SIMD_TMPVAR2 (t1160);
	    DECLARE_SIMD_TMPVAR2 (t1016);
	    DECLARE_SIMD_TMPVAR2 (t1174);
	    DECLARE_SIMD_TMPVAR2 (t1173);
	    DECLARE_SIMD_TMPVAR2 (t1014);
	    DECLARE_SIMD_TMPVAR2 (t1187);
	    DECLARE_SIMD_TMPVAR2 (t1169);
	    DECLARE_SIMD_TMPVAR2 (t1257);
	    DECLARE_SIMD_TMPVAR2 (t1192);
	    DECLARE_SIMD_TMPVAR2 (t1186);
	    DECLARE_SIMD_TMPVAR2 (t1238);
	    DECLARE_SIMD_TMPVAR2 (t1184);
	    DECLARE_SIMD_TMPVAR2 (t1168);
	    DECLARE_SIMD_TMPVAR2 (t1206);
	    DECLARE_SIMD_TMPVAR2 (t1163);
	    DECLARE_SIMD_TMPVAR2 (t1209);
	    DECLARE_SIMD_TMPVAR2 (t1162);
	    DECLARE_SIMD_TMPVAR2 (t1263);
	    DECLARE_SIMD_TMPVAR2 (t1266);
	    DECLARE_SIMD_TMPVAR2 (t1161);
	    DECLARE_SIMD_TMPVAR2 (t1201);
	    DECLARE_SIMD_TMPVAR2 (t1198);
	    DECLARE_SIMD_TMPVAR2 (t1159);
	    DECLARE_SIMD_TMPVAR2 (t1195);
	    DECLARE_SIMD_TMPVAR2 (t1213);
	    DECLARE_SIMD_TMPVAR2 (t1262);
	    DECLARE_SIMD_TMPVAR2 (t1210);
	    DECLARE_SIMD_TMPVAR2 (t1194);
	    DECLARE_SIMD_TMPVAR2 (t1239);
	    DECLARE_SIMD_TMPVAR2 (t1218);
	    DECLARE_SIMD_TMPVAR2 (t1212);

	    simd_ld2 (inout[iostride * 5], t1031);
	    simd_swap2 (t1031, t1032);
	    simd_ld2 (W[4], t1030);
	    simd_mul2 (t1030, t1031, t1028);
	    simd_mul2 (t1030, t1032, t1029);
	    simd_unpckL2 (t1028, t1029, t1221);
	    simd_unpckH2 (t1028, t1029, t1220);
	    simd_fnmca2 (PK1_000000000NK1_000000000, t1220, t1221, t1018);
	    simd_ld2 (inout[iostride * 6], t1143);
	    simd_swap2 (t1143, t1144);
	    simd_ld2 (W[5], t1142);
	    simd_mul2 (t1142, t1143, t1140);
	    simd_mul2 (t1142, t1144, t1141);
	    simd_ld2 (inout[iostride], t1157);
	    simd_swap2 (t1157, t1158);
	    simd_ld2 (W[0], t1156);
	    simd_mul2 (t1156, t1157, t1154);
	    simd_mul2 (t1156, t1158, t1155);
	    simd_unpckL2 (t1140, t1141, t1235);
	    simd_unpckH2 (t1140, t1141, t1234);
	    simd_fnmca2 (PK1_000000000NK1_000000000, t1234, t1235, t1129);
	    simd_unpckL2 (t1154, t1155, t1237);
	    simd_unpckH2 (t1154, t1155, t1236);
	    simd_fnmca2 (PK1_000000000NK1_000000000, t1236, t1237, t1130);
	    simd_add2 (t1129, t1130, t1167);
	    simd_sub2 (t1129, t1130, t1098);
	    simd_ld2 (inout[iostride * 4], t1113);
	    simd_swap2 (t1113, t1114);
	    simd_ld2 (W[3], t1112);
	    simd_mul2 (t1112, t1113, t1110);
	    simd_mul2 (t1112, t1114, t1111);
	    simd_ld2 (inout[iostride * 9], t1127);
	    simd_swap2 (t1127, t1128);
	    simd_ld2 (W[8], t1126);
	    simd_mul2 (t1126, t1127, t1124);
	    simd_mul2 (t1126, t1128, t1125);
	    simd_unpckL2 (t1110, t1111, t1231);
	    simd_unpckH2 (t1110, t1111, t1230);
	    simd_fnmca2 (PK1_000000000NK1_000000000, t1230, t1231, t1099);
	    simd_unpckL2 (t1124, t1125, t1233);
	    simd_unpckH2 (t1124, t1125, t1232);
	    simd_fnmca2 (PK1_000000000NK1_000000000, t1232, t1233, t1100);
	    simd_add2 (t1099, t1100, t1166);
	    simd_sub2 (t1099, t1100, t1097);
	    simd_ld2 (inout[iostride * 8], t1081);
	    simd_swap2 (t1081, t1082);
	    simd_ld2 (W[7], t1080);
	    simd_mul2 (t1080, t1081, t1078);
	    simd_mul2 (t1080, t1082, t1079);
	    simd_ld2 (inout[iostride * 3], t1095);
	    simd_swap2 (t1095, t1096);
	    simd_ld2 (W[2], t1094);
	    simd_mul2 (t1094, t1095, t1092);
	    simd_mul2 (t1094, t1096, t1093);
	    simd_unpckL2 (t1078, t1079, t1227);
	    simd_unpckH2 (t1078, t1079, t1226);
	    simd_fnmca2 (PK1_000000000NK1_000000000, t1226, t1227, t1067);
	    simd_unpckL2 (t1092, t1093, t1229);
	    simd_unpckH2 (t1092, t1093, t1228);
	    simd_fnmca2 (PK1_000000000NK1_000000000, t1228, t1229, t1068);
	    simd_add2 (t1067, t1068, t1165);
	    simd_sub2 (t1067, t1068, t1036);
	    simd_ld2 (inout[iostride * 2], t1051);
	    simd_swap2 (t1051, t1052);
	    simd_ld2 (W[1], t1050);
	    simd_mul2 (t1050, t1051, t1048);
	    simd_mul2 (t1050, t1052, t1049);
	    simd_ld2 (inout[iostride * 7], t1065);
	    simd_swap2 (t1065, t1066);
	    simd_ld2 (W[6], t1064);
	    simd_mul2 (t1064, t1065, t1062);
	    simd_mul2 (t1064, t1066, t1063);
	    simd_unpckL2 (t1048, t1049, t1223);
	    simd_unpckH2 (t1048, t1049, t1222);
	    simd_fnmca2 (PK1_000000000NK1_000000000, t1222, t1223, t1037);
	    simd_unpckL2 (t1062, t1063, t1225);
	    simd_unpckH2 (t1062, t1063, t1224);
	    simd_fnmca2 (PK1_000000000NK1_000000000, t1224, t1225, t1038);
	    simd_add2 (t1037, t1038, t1164);
	    simd_sub2 (t1037, t1038, t1035);
	    simd_sub2 (t1035, t1036, t1180);
	    simd_add2 (t1035, t1036, t1033);
	    simd_sub2 (t1097, t1098, t1183);
	    simd_add2 (t1097, t1098, t1034);
	    simd_fmca2 (PK1_618033988PK1_618033988, t1180, t1183, t1264);
	    simd_fnmca2 (PK618033988PK618033988, t1180, t1183, t1265);
	    simd_ld2 (inout[0], t1017);
	    simd_sub2 (t1017, t1018, t1015);
	    simd_add2 (t1017, t1018, t1160);
	    simd_add2 (t1033, t1034, t1016);
	    simd_sub2 (t1033, t1034, t1174);
	    simd_fnmca2 (PK250000000PK250000000, t1016, t1015, t1173);
	    simd_add2 (t1015, t1016, t1014);
	    simd_st2 (t1014, inout[iostride * 5]);
	    simd_fnmca2 (PK559016994PK559016994, t1174, t1173, t1187);
	    simd_fmca2 (PK559016994PK559016994, t1174, t1173, t1169);
	    simd_swapchsH2 (t1265, t1257);
	    simd_fmca2 (PK951056516PK951056516, t1257, t1187, t1192);
	    simd_fnmca2 (PK951056516PK951056516, t1257, t1187, t1186);
	    simd_st2 (t1192, inout[iostride * 3]);
	    simd_st2 (t1186, inout[iostride * 7]);
	    simd_swapchsH2 (t1264, t1238);
	    simd_fmca2 (PK587785252PK587785252, t1238, t1169, t1184);
	    simd_fnmca2 (PK587785252PK587785252, t1238, t1169, t1168);
	    simd_st2 (t1184, inout[iostride]);
	    simd_st2 (t1168, inout[iostride * 9]);
	    simd_sub2 (t1166, t1167, t1206);
	    simd_add2 (t1166, t1167, t1163);
	    simd_sub2 (t1164, t1165, t1209);
	    simd_add2 (t1164, t1165, t1162);
	    simd_fmca2 (PK618033988PK618033988, t1206, t1209, t1263);
	    simd_fnmca2 (PK618033988PK618033988, t1209, t1206, t1266);
	    simd_add2 (t1162, t1163, t1161);
	    simd_sub2 (t1162, t1163, t1201);
	    simd_fnmca2 (PK250000000PK250000000, t1161, t1160, t1198);
	    simd_add2 (t1160, t1161, t1159);
	    simd_st2 (t1159, inout[0]);
	    simd_fnmca2 (PK559016994PK559016994, t1201, t1198, t1195);
	    simd_fmca2 (PK559016994PK559016994, t1201, t1198, t1213);
	    simd_swapchsH2 (t1266, t1262);
	    simd_fmca2 (PK951056516PK951056516, t1262, t1195, t1210);
	    simd_fnmca2 (PK951056516PK951056516, t1262, t1195, t1194);
	    simd_st2 (t1210, inout[iostride * 8]);
	    simd_st2 (t1194, inout[iostride * 2]);
	    simd_swapchsH2 (t1263, t1239);
	    simd_fmca2 (PK951056516PK951056516, t1239, t1213, t1218);
	    simd_fnmca2 (PK951056516PK951056516, t1239, t1213, t1212);
	    simd_st2 (t1218, inout[iostride * 6]);
	    simd_st2 (t1212, inout[iostride * 4]);
       }
}


static const int twiddle_order[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9 };

fftw_codelet_desc fftw_twiddle_10_desc = {
     "fftw_twiddle_10",
     (void (*)()) fftw_twiddle_10,
     10,
     FFTW_FORWARD,
     FFTW_TWIDDLE,
     220,
     9,
     twiddle_order,
};
