/*
 * Copyright (c) 1997-1999 Massachusetts Institute of Technology
 * Copyright (c) 2000-2002 Stefan Kral
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

/* This file was automatically generated --- DO NOT EDIT */
/* Generated on Tue Feb 19 14:17:03 CET 2002 */

#include <fftw-int.h>
#include <fftw.h>



DECLARE_SIMD_CONST2 (PK500000000PK500000000, +0.5000000000000000000000000,
		     +0.5000000000000000000000000);
DECLARE_SIMD_CONST2 (PK866025403PK866025403, +0.8660254037844386467637232,
		     +0.8660254037844386467637232);
DECLARE_SIMD_CONST2 (PK866025403NK866025403, +0.8660254037844386467637232,
		     -0.8660254037844386467637232);
DECLARE_SIMD_CONST2 (PK1_000000000NK1_000000000, +1.0000000000000000000000000,
		     -1.0000000000000000000000000);

void
fftw_no_twiddle_12 (const fftw_complex * inC, fftw_complex * outC,
		    int istride, int ostride)
{
     const fftw_simd2 *input = (const fftw_simd2 *) inC;
     fftw_simd2 *output = (fftw_simd2 *) outC;
     DECLARE_SIMD_TMPVAR2 (t1008);
     DECLARE_SIMD_TMPVAR2 (t1007);
     DECLARE_SIMD_TMPVAR2 (t1006);
     DECLARE_SIMD_TMPVAR2 (t1046);
     DECLARE_SIMD_TMPVAR2 (t1005);
     DECLARE_SIMD_TMPVAR2 (t1003);
     DECLARE_SIMD_TMPVAR2 (t1041);
     DECLARE_SIMD_TMPVAR2 (t1047);
     DECLARE_SIMD_TMPVAR2 (t1083);
     DECLARE_SIMD_TMPVAR2 (t1039);
     DECLARE_SIMD_TMPVAR2 (t1012);
     DECLARE_SIMD_TMPVAR2 (t1011);
     DECLARE_SIMD_TMPVAR2 (t1010);
     DECLARE_SIMD_TMPVAR2 (t1053);
     DECLARE_SIMD_TMPVAR2 (t1009);
     DECLARE_SIMD_TMPVAR2 (t1004);
     DECLARE_SIMD_TMPVAR2 (t1048);
     DECLARE_SIMD_TMPVAR2 (t1054);
     DECLARE_SIMD_TMPVAR2 (t1084);
     DECLARE_SIMD_TMPVAR2 (t1040);
     DECLARE_SIMD_TMPVAR2 (t1018);
     DECLARE_SIMD_TMPVAR2 (t1017);
     DECLARE_SIMD_TMPVAR2 (t1016);
     DECLARE_SIMD_TMPVAR2 (t1063);
     DECLARE_SIMD_TMPVAR2 (t1015);
     DECLARE_SIMD_TMPVAR2 (t1119);
     DECLARE_SIMD_TMPVAR2 (t1013);
     DECLARE_SIMD_TMPVAR2 (t1022);
     DECLARE_SIMD_TMPVAR2 (t1021);
     DECLARE_SIMD_TMPVAR2 (t1020);
     DECLARE_SIMD_TMPVAR2 (t1070);
     DECLARE_SIMD_TMPVAR2 (t1019);
     DECLARE_SIMD_TMPVAR2 (t1120);
     DECLARE_SIMD_TMPVAR2 (t1014);
     DECLARE_SIMD_TMPVAR2 (t1057);
     DECLARE_SIMD_TMPVAR2 (t1085);
     DECLARE_SIMD_TMPVAR2 (t1055);
     DECLARE_SIMD_TMPVAR2 (t1064);
     DECLARE_SIMD_TMPVAR2 (t1086);
     DECLARE_SIMD_TMPVAR2 (t1056);
     DECLARE_SIMD_TMPVAR2 (t1032);
     DECLARE_SIMD_TMPVAR2 (t1002);
     DECLARE_SIMD_TMPVAR2 (t1028);
     DECLARE_SIMD_TMPVAR2 (t1001);
     DECLARE_SIMD_TMPVAR2 (t1029);
     DECLARE_SIMD_TMPVAR2 (t1033);
     DECLARE_SIMD_TMPVAR2 (t1024);
     DECLARE_SIMD_TMPVAR2 (t1023);
     DECLARE_SIMD_TMPVAR2 (t1000);
     DECLARE_SIMD_TMPVAR2 (t1074);
     DECLARE_SIMD_TMPVAR2 (t1036);
     DECLARE_SIMD_TMPVAR2 (t1077);
     DECLARE_SIMD_TMPVAR2 (t1037);
     DECLARE_SIMD_TMPVAR2 (t1075);
     DECLARE_SIMD_TMPVAR2 (t1078);
     DECLARE_SIMD_TMPVAR2 (t1073);
     DECLARE_SIMD_TMPVAR2 (t1071);
     DECLARE_SIMD_TMPVAR2 (t1035);
     DECLARE_SIMD_TMPVAR2 (t1081);
     DECLARE_SIMD_TMPVAR2 (t1093);
     DECLARE_SIMD_TMPVAR2 (t1080);
     DECLARE_SIMD_TMPVAR2 (t1090);
     DECLARE_SIMD_TMPVAR2 (t1087);
     DECLARE_SIMD_TMPVAR2 (t1079);
     DECLARE_SIMD_TMPVAR2 (t1091);
     DECLARE_SIMD_TMPVAR2 (t1094);
     DECLARE_SIMD_TMPVAR2 (t1089);

     simd_ld2 (input[istride * 8], t1008);
     simd_ld2 (input[istride * 4], t1007);
     simd_add2 (t1007, t1008, t1006);
     simd_sub2 (t1007, t1008, t1046);
     simd_ld2 (input[0], t1005);
     simd_add2 (t1005, t1006, t1003);
     simd_fnmca2 (PK500000000PK500000000, t1006, t1005, t1041);
     simd_swapchsH2 (t1046, t1047);
     simd_fmca2 (PK866025403PK866025403, t1047, t1041, t1083);
     simd_fnmca2 (PK866025403PK866025403, t1047, t1041, t1039);
     simd_ld2 (input[istride * 2], t1012);
     simd_ld2 (input[istride * 10], t1011);
     simd_add2 (t1011, t1012, t1010);
     simd_sub2 (t1011, t1012, t1053);
     simd_ld2 (input[istride * 6], t1009);
     simd_add2 (t1009, t1010, t1004);
     simd_fnmca2 (PK500000000PK500000000, t1010, t1009, t1048);
     simd_swapchsH2 (t1053, t1054);
     simd_fmca2 (PK866025403PK866025403, t1054, t1048, t1084);
     simd_fnmca2 (PK866025403PK866025403, t1054, t1048, t1040);
     simd_ld2 (input[istride * 11], t1018);
     simd_ld2 (input[istride * 7], t1017);
     simd_add2 (t1017, t1018, t1016);
     simd_sub2 (t1018, t1017, t1063);
     simd_ld2 (input[istride * 3], t1015);
     simd_fnmca2 (PK500000000PK500000000, t1016, t1015, t1119);
     simd_add2 (t1015, t1016, t1013);
     simd_ld2 (input[istride * 5], t1022);
     simd_ld2 (input[istride], t1021);
     simd_add2 (t1021, t1022, t1020);
     simd_sub2 (t1022, t1021, t1070);
     simd_ld2 (input[istride * 9], t1019);
     simd_fnmca2 (PK500000000PK500000000, t1020, t1019, t1120);
     simd_add2 (t1019, t1020, t1014);
     simd_swap2 (t1119, t1057);
     simd_fmca2 (PK866025403NK866025403, t1063, t1057, t1085);
     simd_fnmca2 (PK866025403NK866025403, t1063, t1057, t1055);
     simd_swap2 (t1120, t1064);
     simd_fmca2 (PK866025403NK866025403, t1070, t1064, t1086);
     simd_fnmca2 (PK866025403NK866025403, t1070, t1064, t1056);
     simd_sub2 (t1013, t1014, t1032);
     simd_add2 (t1013, t1014, t1002);
     simd_sub2 (t1003, t1004, t1028);
     simd_add2 (t1003, t1004, t1001);
     simd_swapchsH2 (t1032, t1029);
     simd_add2 (t1029, t1028, t1033);
     simd_sub2 (t1028, t1029, t1024);
     simd_st2 (t1033, output[ostride * 9]);
     simd_st2 (t1024, output[ostride * 3]);
     simd_add2 (t1001, t1002, t1023);
     simd_sub2 (t1001, t1002, t1000);
     simd_st2 (t1023, output[0]);
     simd_st2 (t1000, output[ostride * 6]);
     simd_add2 (t1039, t1040, t1074);
     simd_sub2 (t1039, t1040, t1036);
     simd_add2 (t1055, t1056, t1077);
     simd_sub2 (t1055, t1056, t1037);
     simd_swap2 (t1077, t1075);
     simd_add2 (t1074, t1075, t1078);
     simd_sub2 (t1074, t1075, t1073);
     simd_st2 (t1078, output[ostride * 8]);
     simd_st2 (t1073, output[ostride * 2]);
     simd_fnmca2 (PK1_000000000NK1_000000000, t1037, t1036, t1071);
     simd_fmca2 (PK1_000000000NK1_000000000, t1037, t1036, t1035);
     simd_st2 (t1071, output[ostride * 11]);
     simd_st2 (t1035, output[ostride * 5]);
     simd_sub2 (t1085, t1086, t1081);
     simd_add2 (t1085, t1086, t1093);
     simd_sub2 (t1083, t1084, t1080);
     simd_add2 (t1083, t1084, t1090);
     simd_fnmca2 (PK1_000000000NK1_000000000, t1081, t1080, t1087);
     simd_fmca2 (PK1_000000000NK1_000000000, t1081, t1080, t1079);
     simd_st2 (t1087, output[ostride * 7]);
     simd_st2 (t1079, output[ostride]);
     simd_swap2 (t1093, t1091);
     simd_add2 (t1090, t1091, t1094);
     simd_sub2 (t1090, t1091, t1089);
     simd_st2 (t1094, output[ostride * 4]);
     simd_st2 (t1089, output[ostride * 10]);
}


fftw_codelet_desc fftw_no_twiddle_12_desc = {
     "fftw_no_twiddle_12",
     (void (*)()) fftw_no_twiddle_12,
     12,
     FFTW_FORWARD,
     FFTW_NOTW,
     265,
     0,
     (const int *) 0,
};
