/*
 * Copyright (c) 1997-1999 Massachusetts Institute of Technology
 * Copyright (c) 2000-2002 Stefan Kral
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

/* This file was automatically generated --- DO NOT EDIT */
/* Generated on Tue Feb 19 15:28:05 CET 2002 */

#include <fftw-int.h>
#include <fftw.h>



DECLARE_SIMD_CONST2 (PK1_000000000NK1_000000000, +1.0000000000000000000000000,
		     -1.0000000000000000000000000);
DECLARE_SIMD_CONST2 (PK1_618033988PK1_618033988, +1.6180339887498948482045868,
		     +1.6180339887498948482045868);
DECLARE_SIMD_CONST2 (PK250000000PK250000000, +0.2500000000000000000000000,
		     +0.2500000000000000000000000);
DECLARE_SIMD_CONST2 (PK559016994PK559016994, +0.5590169943749474241022934,
		     +0.5590169943749474241022934);
DECLARE_SIMD_CONST2 (PK587785252PK587785252, +0.5877852522924731291687060,
		     +0.5877852522924731291687060);

void
fftwi_twiddle_10 (fftw_complex * ioC, const fftw_complex * twC, int iostride,
		  int m, int dist)
{
     fftw_simd2 *inout = (fftw_simd2 *) ioC;
     const fftw_simd2 *W = (const fftw_simd2 *) twC;

     for (; m > 0; m--, inout += dist, W += 9)
       {
	    DECLARE_SIMD_TMPVAR2 (t1045);
	    DECLARE_SIMD_TMPVAR2 (t1046);
	    DECLARE_SIMD_TMPVAR2 (t1044);
	    DECLARE_SIMD_TMPVAR2 (t1042);
	    DECLARE_SIMD_TMPVAR2 (t1043);
	    DECLARE_SIMD_TMPVAR2 (t1235);
	    DECLARE_SIMD_TMPVAR2 (t1234);
	    DECLARE_SIMD_TMPVAR2 (t1032);
	    DECLARE_SIMD_TMPVAR2 (t1157);
	    DECLARE_SIMD_TMPVAR2 (t1158);
	    DECLARE_SIMD_TMPVAR2 (t1156);
	    DECLARE_SIMD_TMPVAR2 (t1154);
	    DECLARE_SIMD_TMPVAR2 (t1155);
	    DECLARE_SIMD_TMPVAR2 (t1171);
	    DECLARE_SIMD_TMPVAR2 (t1172);
	    DECLARE_SIMD_TMPVAR2 (t1170);
	    DECLARE_SIMD_TMPVAR2 (t1168);
	    DECLARE_SIMD_TMPVAR2 (t1169);
	    DECLARE_SIMD_TMPVAR2 (t1249);
	    DECLARE_SIMD_TMPVAR2 (t1248);
	    DECLARE_SIMD_TMPVAR2 (t1143);
	    DECLARE_SIMD_TMPVAR2 (t1251);
	    DECLARE_SIMD_TMPVAR2 (t1250);
	    DECLARE_SIMD_TMPVAR2 (t1144);
	    DECLARE_SIMD_TMPVAR2 (t1181);
	    DECLARE_SIMD_TMPVAR2 (t1112);
	    DECLARE_SIMD_TMPVAR2 (t1127);
	    DECLARE_SIMD_TMPVAR2 (t1128);
	    DECLARE_SIMD_TMPVAR2 (t1126);
	    DECLARE_SIMD_TMPVAR2 (t1124);
	    DECLARE_SIMD_TMPVAR2 (t1125);
	    DECLARE_SIMD_TMPVAR2 (t1141);
	    DECLARE_SIMD_TMPVAR2 (t1142);
	    DECLARE_SIMD_TMPVAR2 (t1140);
	    DECLARE_SIMD_TMPVAR2 (t1138);
	    DECLARE_SIMD_TMPVAR2 (t1139);
	    DECLARE_SIMD_TMPVAR2 (t1245);
	    DECLARE_SIMD_TMPVAR2 (t1244);
	    DECLARE_SIMD_TMPVAR2 (t1113);
	    DECLARE_SIMD_TMPVAR2 (t1247);
	    DECLARE_SIMD_TMPVAR2 (t1246);
	    DECLARE_SIMD_TMPVAR2 (t1114);
	    DECLARE_SIMD_TMPVAR2 (t1180);
	    DECLARE_SIMD_TMPVAR2 (t1111);
	    DECLARE_SIMD_TMPVAR2 (t1095);
	    DECLARE_SIMD_TMPVAR2 (t1096);
	    DECLARE_SIMD_TMPVAR2 (t1094);
	    DECLARE_SIMD_TMPVAR2 (t1092);
	    DECLARE_SIMD_TMPVAR2 (t1093);
	    DECLARE_SIMD_TMPVAR2 (t1109);
	    DECLARE_SIMD_TMPVAR2 (t1110);
	    DECLARE_SIMD_TMPVAR2 (t1108);
	    DECLARE_SIMD_TMPVAR2 (t1106);
	    DECLARE_SIMD_TMPVAR2 (t1107);
	    DECLARE_SIMD_TMPVAR2 (t1241);
	    DECLARE_SIMD_TMPVAR2 (t1240);
	    DECLARE_SIMD_TMPVAR2 (t1081);
	    DECLARE_SIMD_TMPVAR2 (t1243);
	    DECLARE_SIMD_TMPVAR2 (t1242);
	    DECLARE_SIMD_TMPVAR2 (t1082);
	    DECLARE_SIMD_TMPVAR2 (t1179);
	    DECLARE_SIMD_TMPVAR2 (t1050);
	    DECLARE_SIMD_TMPVAR2 (t1065);
	    DECLARE_SIMD_TMPVAR2 (t1066);
	    DECLARE_SIMD_TMPVAR2 (t1064);
	    DECLARE_SIMD_TMPVAR2 (t1062);
	    DECLARE_SIMD_TMPVAR2 (t1063);
	    DECLARE_SIMD_TMPVAR2 (t1079);
	    DECLARE_SIMD_TMPVAR2 (t1080);
	    DECLARE_SIMD_TMPVAR2 (t1078);
	    DECLARE_SIMD_TMPVAR2 (t1076);
	    DECLARE_SIMD_TMPVAR2 (t1077);
	    DECLARE_SIMD_TMPVAR2 (t1237);
	    DECLARE_SIMD_TMPVAR2 (t1236);
	    DECLARE_SIMD_TMPVAR2 (t1051);
	    DECLARE_SIMD_TMPVAR2 (t1239);
	    DECLARE_SIMD_TMPVAR2 (t1238);
	    DECLARE_SIMD_TMPVAR2 (t1052);
	    DECLARE_SIMD_TMPVAR2 (t1178);
	    DECLARE_SIMD_TMPVAR2 (t1049);
	    DECLARE_SIMD_TMPVAR2 (t1194);
	    DECLARE_SIMD_TMPVAR2 (t1047);
	    DECLARE_SIMD_TMPVAR2 (t1197);
	    DECLARE_SIMD_TMPVAR2 (t1048);
	    DECLARE_SIMD_TMPVAR2 (t1278);
	    DECLARE_SIMD_TMPVAR2 (t1279);
	    DECLARE_SIMD_TMPVAR2 (t1031);
	    DECLARE_SIMD_TMPVAR2 (t1029);
	    DECLARE_SIMD_TMPVAR2 (t1174);
	    DECLARE_SIMD_TMPVAR2 (t1030);
	    DECLARE_SIMD_TMPVAR2 (t1189);
	    DECLARE_SIMD_TMPVAR2 (t1186);
	    DECLARE_SIMD_TMPVAR2 (t1028);
	    DECLARE_SIMD_TMPVAR2 (t1183);
	    DECLARE_SIMD_TMPVAR2 (t1201);
	    DECLARE_SIMD_TMPVAR2 (t1271);
	    DECLARE_SIMD_TMPVAR2 (t1198);
	    DECLARE_SIMD_TMPVAR2 (t1182);
	    DECLARE_SIMD_TMPVAR2 (t1252);
	    DECLARE_SIMD_TMPVAR2 (t1206);
	    DECLARE_SIMD_TMPVAR2 (t1200);
	    DECLARE_SIMD_TMPVAR2 (t1220);
	    DECLARE_SIMD_TMPVAR2 (t1176);
	    DECLARE_SIMD_TMPVAR2 (t1223);
	    DECLARE_SIMD_TMPVAR2 (t1177);
	    DECLARE_SIMD_TMPVAR2 (t1277);
	    DECLARE_SIMD_TMPVAR2 (t1280);
	    DECLARE_SIMD_TMPVAR2 (t1175);
	    DECLARE_SIMD_TMPVAR2 (t1215);
	    DECLARE_SIMD_TMPVAR2 (t1212);
	    DECLARE_SIMD_TMPVAR2 (t1173);
	    DECLARE_SIMD_TMPVAR2 (t1209);
	    DECLARE_SIMD_TMPVAR2 (t1227);
	    DECLARE_SIMD_TMPVAR2 (t1276);
	    DECLARE_SIMD_TMPVAR2 (t1224);
	    DECLARE_SIMD_TMPVAR2 (t1208);
	    DECLARE_SIMD_TMPVAR2 (t1253);
	    DECLARE_SIMD_TMPVAR2 (t1232);
	    DECLARE_SIMD_TMPVAR2 (t1226);

	    simd_ld2 (inout[iostride * 5], t1045);
	    simd_swap2 (t1045, t1046);
	    simd_ld2 (W[4], t1044);
	    simd_mul2 (t1044, t1045, t1042);
	    simd_mul2 (t1044, t1046, t1043);
	    simd_unpckL2 (t1042, t1043, t1235);
	    simd_unpckH2 (t1042, t1043, t1234);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1234, t1235, t1032);
	    simd_ld2 (inout[iostride * 6], t1157);
	    simd_swap2 (t1157, t1158);
	    simd_ld2 (W[5], t1156);
	    simd_mul2 (t1156, t1157, t1154);
	    simd_mul2 (t1156, t1158, t1155);
	    simd_ld2 (inout[iostride], t1171);
	    simd_swap2 (t1171, t1172);
	    simd_ld2 (W[0], t1170);
	    simd_mul2 (t1170, t1171, t1168);
	    simd_mul2 (t1170, t1172, t1169);
	    simd_unpckL2 (t1154, t1155, t1249);
	    simd_unpckH2 (t1154, t1155, t1248);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1248, t1249, t1143);
	    simd_unpckL2 (t1168, t1169, t1251);
	    simd_unpckH2 (t1168, t1169, t1250);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1250, t1251, t1144);
	    simd_add2 (t1143, t1144, t1181);
	    simd_sub2 (t1143, t1144, t1112);
	    simd_ld2 (inout[iostride * 4], t1127);
	    simd_swap2 (t1127, t1128);
	    simd_ld2 (W[3], t1126);
	    simd_mul2 (t1126, t1127, t1124);
	    simd_mul2 (t1126, t1128, t1125);
	    simd_ld2 (inout[iostride * 9], t1141);
	    simd_swap2 (t1141, t1142);
	    simd_ld2 (W[8], t1140);
	    simd_mul2 (t1140, t1141, t1138);
	    simd_mul2 (t1140, t1142, t1139);
	    simd_unpckL2 (t1124, t1125, t1245);
	    simd_unpckH2 (t1124, t1125, t1244);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1244, t1245, t1113);
	    simd_unpckL2 (t1138, t1139, t1247);
	    simd_unpckH2 (t1138, t1139, t1246);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1246, t1247, t1114);
	    simd_add2 (t1113, t1114, t1180);
	    simd_sub2 (t1113, t1114, t1111);
	    simd_ld2 (inout[iostride * 8], t1095);
	    simd_swap2 (t1095, t1096);
	    simd_ld2 (W[7], t1094);
	    simd_mul2 (t1094, t1095, t1092);
	    simd_mul2 (t1094, t1096, t1093);
	    simd_ld2 (inout[iostride * 3], t1109);
	    simd_swap2 (t1109, t1110);
	    simd_ld2 (W[2], t1108);
	    simd_mul2 (t1108, t1109, t1106);
	    simd_mul2 (t1108, t1110, t1107);
	    simd_unpckL2 (t1092, t1093, t1241);
	    simd_unpckH2 (t1092, t1093, t1240);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1240, t1241, t1081);
	    simd_unpckL2 (t1106, t1107, t1243);
	    simd_unpckH2 (t1106, t1107, t1242);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1242, t1243, t1082);
	    simd_add2 (t1081, t1082, t1179);
	    simd_sub2 (t1081, t1082, t1050);
	    simd_ld2 (inout[iostride * 2], t1065);
	    simd_swap2 (t1065, t1066);
	    simd_ld2 (W[1], t1064);
	    simd_mul2 (t1064, t1065, t1062);
	    simd_mul2 (t1064, t1066, t1063);
	    simd_ld2 (inout[iostride * 7], t1079);
	    simd_swap2 (t1079, t1080);
	    simd_ld2 (W[6], t1078);
	    simd_mul2 (t1078, t1079, t1076);
	    simd_mul2 (t1078, t1080, t1077);
	    simd_unpckL2 (t1062, t1063, t1237);
	    simd_unpckH2 (t1062, t1063, t1236);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1236, t1237, t1051);
	    simd_unpckL2 (t1076, t1077, t1239);
	    simd_unpckH2 (t1076, t1077, t1238);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1238, t1239, t1052);
	    simd_add2 (t1051, t1052, t1178);
	    simd_sub2 (t1051, t1052, t1049);
	    simd_sub2 (t1049, t1050, t1194);
	    simd_add2 (t1049, t1050, t1047);
	    simd_sub2 (t1111, t1112, t1197);
	    simd_add2 (t1111, t1112, t1048);
	    simd_fmca2 (PK1_618033988PK1_618033988, t1194, t1197, t1278);
	    simd_fnmca2 (PK1_618033988PK1_618033988, t1197, t1194, t1279);
	    simd_ld2 (inout[0], t1031);
	    simd_sub2 (t1031, t1032, t1029);
	    simd_add2 (t1031, t1032, t1174);
	    simd_add2 (t1047, t1048, t1030);
	    simd_sub2 (t1047, t1048, t1189);
	    simd_fnmca2 (PK250000000PK250000000, t1030, t1029, t1186);
	    simd_add2 (t1029, t1030, t1028);
	    simd_st2 (t1028, inout[iostride * 5]);
	    simd_fnmca2 (PK559016994PK559016994, t1189, t1186, t1183);
	    simd_fmca2 (PK559016994PK559016994, t1189, t1186, t1201);
	    simd_swapchsH2 (t1279, t1271);
	    simd_fmca2 (PK587785252PK587785252, t1271, t1183, t1198);
	    simd_fnmca2 (PK587785252PK587785252, t1271, t1183, t1182);
	    simd_st2 (t1198, inout[iostride * 3]);
	    simd_st2 (t1182, inout[iostride * 7]);
	    simd_swapchsH2 (t1278, t1252);
	    simd_fmca2 (PK587785252PK587785252, t1252, t1201, t1206);
	    simd_fnmca2 (PK587785252PK587785252, t1252, t1201, t1200);
	    simd_st2 (t1206, inout[iostride * 9]);
	    simd_st2 (t1200, inout[iostride]);
	    simd_sub2 (t1178, t1179, t1220);
	    simd_add2 (t1178, t1179, t1176);
	    simd_sub2 (t1180, t1181, t1223);
	    simd_add2 (t1180, t1181, t1177);
	    simd_fmca2 (PK1_618033988PK1_618033988, t1220, t1223, t1277);
	    simd_fnmca2 (PK1_618033988PK1_618033988, t1223, t1220, t1280);
	    simd_add2 (t1176, t1177, t1175);
	    simd_sub2 (t1176, t1177, t1215);
	    simd_fnmca2 (PK250000000PK250000000, t1175, t1174, t1212);
	    simd_add2 (t1174, t1175, t1173);
	    simd_st2 (t1173, inout[0]);
	    simd_fnmca2 (PK559016994PK559016994, t1215, t1212, t1209);
	    simd_fmca2 (PK559016994PK559016994, t1215, t1212, t1227);
	    simd_swapchsH2 (t1280, t1276);
	    simd_fmca2 (PK587785252PK587785252, t1276, t1209, t1224);
	    simd_fnmca2 (PK587785252PK587785252, t1276, t1209, t1208);
	    simd_st2 (t1224, inout[iostride * 8]);
	    simd_st2 (t1208, inout[iostride * 2]);
	    simd_swapchsH2 (t1277, t1253);
	    simd_fmca2 (PK587785252PK587785252, t1253, t1227, t1232);
	    simd_fnmca2 (PK587785252PK587785252, t1253, t1227, t1226);
	    simd_st2 (t1232, inout[iostride * 4]);
	    simd_st2 (t1226, inout[iostride * 6]);
       }
}


static const int twiddle_order[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9 };

fftw_codelet_desc fftwi_twiddle_10_desc = {
     "fftwi_twiddle_10",
     (void (*)()) fftwi_twiddle_10,
     10,
     FFTW_BACKWARD,
     FFTW_TWIDDLE,
     231,
     9,
     twiddle_order,
};
