/*
 * Copyright (c) 1997-1999 Massachusetts Institute of Technology
 * Copyright (c) 2000-2002 Stefan Kral
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

/* This file was automatically generated --- DO NOT EDIT */
/* Generated on Tue Feb 19 15:28:02 CET 2002 */

#include <fftw-int.h>
#include <fftw.h>



DECLARE_SIMD_CONST2 (PK1_000000000NK1_000000000, +1.0000000000000000000000000,
		     -1.0000000000000000000000000);
DECLARE_SIMD_CONST2 (PK707106781PK707106781, +0.7071067811865475244008444,
		     +0.7071067811865475244008444);

void
fftwi_twiddle_8 (fftw_complex * ioC, const fftw_complex * twC, int iostride,
		 int m, int dist)
{
     fftw_simd2 *inout = (fftw_simd2 *) ioC;
     const fftw_simd2 *W = (const fftw_simd2 *) twC;

     for (; m > 0; m--, inout += dist, W += 7)
       {
	    DECLARE_SIMD_TMPVAR2 (t1104);
	    DECLARE_SIMD_TMPVAR2 (t1140);
	    DECLARE_SIMD_TMPVAR2 (t1103);
	    DECLARE_SIMD_TMPVAR2 (t1101);
	    DECLARE_SIMD_TMPVAR2 (t1138);
	    DECLARE_SIMD_TMPVAR2 (t1128);
	    DECLARE_SIMD_TMPVAR2 (t1127);
	    DECLARE_SIMD_TMPVAR2 (t1126);
	    DECLARE_SIMD_TMPVAR2 (t1123);
	    DECLARE_SIMD_TMPVAR2 (t1147);
	    DECLARE_SIMD_TMPVAR2 (t1107);
	    DECLARE_SIMD_TMPVAR2 (t1106);
	    DECLARE_SIMD_TMPVAR2 (t1105);
	    DECLARE_SIMD_TMPVAR2 (t1102);
	    DECLARE_SIMD_TMPVAR2 (t1137);
	    DECLARE_SIMD_TMPVAR2 (t1125);
	    DECLARE_SIMD_TMPVAR2 (t1150);
	    DECLARE_SIMD_TMPVAR2 (t1124);
	    DECLARE_SIMD_TMPVAR2 (t1122);
	    DECLARE_SIMD_TMPVAR2 (t1148);
	    DECLARE_SIMD_TMPVAR2 (t1191);
	    DECLARE_SIMD_TMPVAR2 (t1190);
	    DECLARE_SIMD_TMPVAR2 (t1085);
	    DECLARE_SIMD_TMPVAR2 (t1193);
	    DECLARE_SIMD_TMPVAR2 (t1192);
	    DECLARE_SIMD_TMPVAR2 (t1086);
	    DECLARE_SIMD_TMPVAR2 (t1163);
	    DECLARE_SIMD_TMPVAR2 (t1083);
	    DECLARE_SIMD_TMPVAR2 (t1195);
	    DECLARE_SIMD_TMPVAR2 (t1194);
	    DECLARE_SIMD_TMPVAR2 (t1129);
	    DECLARE_SIMD_TMPVAR2 (t1197);
	    DECLARE_SIMD_TMPVAR2 (t1196);
	    DECLARE_SIMD_TMPVAR2 (t1130);
	    DECLARE_SIMD_TMPVAR2 (t1166);
	    DECLARE_SIMD_TMPVAR2 (t1084);
	    DECLARE_SIMD_TMPVAR2 (t1051);
	    DECLARE_SIMD_TMPVAR2 (t1052);
	    DECLARE_SIMD_TMPVAR2 (t1050);
	    DECLARE_SIMD_TMPVAR2 (t1048);
	    DECLARE_SIMD_TMPVAR2 (t1049);
	    DECLARE_SIMD_TMPVAR2 (t1185);
	    DECLARE_SIMD_TMPVAR2 (t1184);
	    DECLARE_SIMD_TMPVAR2 (t1038);
	    DECLARE_SIMD_TMPVAR2 (t1067);
	    DECLARE_SIMD_TMPVAR2 (t1068);
	    DECLARE_SIMD_TMPVAR2 (t1066);
	    DECLARE_SIMD_TMPVAR2 (t1064);
	    DECLARE_SIMD_TMPVAR2 (t1065);
	    DECLARE_SIMD_TMPVAR2 (t1187);
	    DECLARE_SIMD_TMPVAR2 (t1186);
	    DECLARE_SIMD_TMPVAR2 (t1053);
	    DECLARE_SIMD_TMPVAR2 (t1081);
	    DECLARE_SIMD_TMPVAR2 (t1082);
	    DECLARE_SIMD_TMPVAR2 (t1080);
	    DECLARE_SIMD_TMPVAR2 (t1078);
	    DECLARE_SIMD_TMPVAR2 (t1079);
	    DECLARE_SIMD_TMPVAR2 (t1189);
	    DECLARE_SIMD_TMPVAR2 (t1188);
	    DECLARE_SIMD_TMPVAR2 (t1054);
	    DECLARE_SIMD_TMPVAR2 (t1037);
	    DECLARE_SIMD_TMPVAR2 (t1035);
	    DECLARE_SIMD_TMPVAR2 (t1155);
	    DECLARE_SIMD_TMPVAR2 (t1036);
	    DECLARE_SIMD_TMPVAR2 (t1159);
	    DECLARE_SIMD_TMPVAR2 (t1033);
	    DECLARE_SIMD_TMPVAR2 (t1179);
	    DECLARE_SIMD_TMPVAR2 (t1182);
	    DECLARE_SIMD_TMPVAR2 (t1034);
	    DECLARE_SIMD_TMPVAR2 (t1151);
	    DECLARE_SIMD_TMPVAR2 (t1032);
	    DECLARE_SIMD_TMPVAR2 (t1180);
	    DECLARE_SIMD_TMPVAR2 (t1183);
	    DECLARE_SIMD_TMPVAR2 (t1178);
	    DECLARE_SIMD_TMPVAR2 (t1168);
	    DECLARE_SIMD_TMPVAR2 (t1162);
	    DECLARE_SIMD_TMPVAR2 (t1164);
	    DECLARE_SIMD_TMPVAR2 (t1161);
	    DECLARE_SIMD_TMPVAR2 (t1160);
	    DECLARE_SIMD_TMPVAR2 (t1176);
	    DECLARE_SIMD_TMPVAR2 (t1156);
	    DECLARE_SIMD_TMPVAR2 (t1171);
	    DECLARE_SIMD_TMPVAR2 (t1153);
	    DECLARE_SIMD_TMPVAR2 (t1169);
	    DECLARE_SIMD_TMPVAR2 (t1152);
	    DECLARE_SIMD_TMPVAR2 (t1174);
	    DECLARE_SIMD_TMPVAR2 (t1177);
	    DECLARE_SIMD_TMPVAR2 (t1170);

	    simd_ld2 (inout[iostride], t1104);
	    simd_swap2 (t1104, t1140);
	    simd_ld2 (W[0], t1103);
	    simd_mul2 (t1103, t1104, t1101);
	    simd_mul2 (t1103, t1140, t1138);
	    simd_ld2 (inout[iostride * 3], t1128);
	    simd_swap2 (t1128, t1127);
	    simd_ld2 (W[2], t1126);
	    simd_mul2 (t1126, t1127, t1123);
	    simd_mul2 (t1126, t1128, t1147);
	    simd_ld2 (inout[iostride * 7], t1107);
	    simd_swap2 (t1107, t1106);
	    simd_ld2 (W[6], t1105);
	    simd_mul2 (t1105, t1106, t1102);
	    simd_mul2 (t1105, t1107, t1137);
	    simd_ld2 (inout[iostride * 5], t1125);
	    simd_swap2 (t1125, t1150);
	    simd_ld2 (W[4], t1124);
	    simd_mul2 (t1124, t1125, t1122);
	    simd_mul2 (t1124, t1150, t1148);
	    simd_unpckL2 (t1101, t1102, t1191);
	    simd_unpckH2 (t1101, t1102, t1190);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1190, t1191, t1085);
	    simd_unpckL2 (t1122, t1123, t1193);
	    simd_unpckH2 (t1122, t1123, t1192);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1192, t1193, t1086);
	    simd_sub2 (t1085, t1086, t1163);
	    simd_add2 (t1085, t1086, t1083);
	    simd_unpckL2 (t1137, t1138, t1195);
	    simd_unpckH2 (t1137, t1138, t1194);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1194, t1195, t1129);
	    simd_unpckL2 (t1147, t1148, t1197);
	    simd_unpckH2 (t1147, t1148, t1196);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1196, t1197, t1130);
	    simd_sub2 (t1129, t1130, t1166);
	    simd_add2 (t1129, t1130, t1084);
	    simd_ld2 (inout[iostride * 4], t1051);
	    simd_swap2 (t1051, t1052);
	    simd_ld2 (W[3], t1050);
	    simd_mul2 (t1050, t1051, t1048);
	    simd_mul2 (t1050, t1052, t1049);
	    simd_unpckL2 (t1048, t1049, t1185);
	    simd_unpckH2 (t1048, t1049, t1184);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1184, t1185, t1038);
	    simd_ld2 (inout[iostride * 2], t1067);
	    simd_swap2 (t1067, t1068);
	    simd_ld2 (W[1], t1066);
	    simd_mul2 (t1066, t1067, t1064);
	    simd_mul2 (t1066, t1068, t1065);
	    simd_unpckL2 (t1064, t1065, t1187);
	    simd_unpckH2 (t1064, t1065, t1186);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1186, t1187, t1053);
	    simd_ld2 (inout[iostride * 6], t1081);
	    simd_swap2 (t1081, t1082);
	    simd_ld2 (W[5], t1080);
	    simd_mul2 (t1080, t1081, t1078);
	    simd_mul2 (t1080, t1082, t1079);
	    simd_unpckL2 (t1078, t1079, t1189);
	    simd_unpckH2 (t1078, t1079, t1188);
	    simd_fmca2 (PK1_000000000NK1_000000000, t1188, t1189, t1054);
	    simd_ld2 (inout[0], t1037);
	    simd_add2 (t1037, t1038, t1035);
	    simd_sub2 (t1037, t1038, t1155);
	    simd_add2 (t1053, t1054, t1036);
	    simd_sub2 (t1053, t1054, t1159);
	    simd_add2 (t1035, t1036, t1033);
	    simd_sub2 (t1035, t1036, t1179);
	    simd_sub2 (t1083, t1084, t1182);
	    simd_add2 (t1083, t1084, t1034);
	    simd_add2 (t1033, t1034, t1151);
	    simd_sub2 (t1033, t1034, t1032);
	    simd_st2 (t1151, inout[0]);
	    simd_st2 (t1032, inout[iostride * 4]);
	    simd_swap2 (t1182, t1180);
	    simd_add2 (t1179, t1180, t1183);
	    simd_sub2 (t1179, t1180, t1178);
	    simd_st2 (t1183, inout[iostride * 2]);
	    simd_st2 (t1178, inout[iostride * 6]);
	    simd_swap2 (t1163, t1168);
	    simd_add2 (t1166, t1168, t1162);
	    simd_swap2 (t1166, t1164);
	    simd_sub2 (t1163, t1164, t1161);
	    simd_add2 (t1161, t1162, t1160);
	    simd_sub2 (t1161, t1162, t1176);
	    simd_swapchsH2 (t1159, t1156);
	    simd_add2 (t1156, t1155, t1171);
	    simd_sub2 (t1155, t1156, t1153);
	    simd_fmca2 (PK707106781PK707106781, t1160, t1153, t1169);
	    simd_fnmca2 (PK707106781PK707106781, t1160, t1153, t1152);
	    simd_st2 (t1169, inout[iostride]);
	    simd_st2 (t1152, inout[iostride * 5]);
	    simd_swap2 (t1176, t1174);
	    simd_fmca2 (PK707106781PK707106781, t1174, t1171, t1177);
	    simd_fnmca2 (PK707106781PK707106781, t1174, t1171, t1170);
	    simd_st2 (t1177, inout[iostride * 3]);
	    simd_st2 (t1170, inout[iostride * 7]);
       }
}


static const int twiddle_order[] = { 1, 2, 3, 4, 5, 6, 7 };

fftw_codelet_desc fftwi_twiddle_8_desc = {
     "fftwi_twiddle_8",
     (void (*)()) fftwi_twiddle_8,
     8,
     FFTW_BACKWARD,
     FFTW_TWIDDLE,
     187,
     7,
     twiddle_order,
};
