Vortrag am Institut für Computersprachen

Programmiersprachen und Übersetzerbau (ehem. 185/1)
Argentinierstr.8, 4. Stock
A-1040 Wien
http://www.complang.tuwien.ac.at/

Retargetable Code Generation for DSP Processors

Instruction Scheduling and Modulo-Scheduling for DSP Processors

Montag, den 1. 7. 2001 um 14 Uhr und 15:30 c.t. in der Bibliothek 185/1, Argentinierstrasse 8, 4. Stock

Vortragender

Dr.Y.N. Srikant

Y.N. Srikant received his Master's degree and Ph.D in Computer Science from the Computer Science and Automation department of the Indian Institute of Science, Bangalore, India. He is the recipient of Young Scientist medal of the Indian National Science Academy. He has guided a number of Ph.D, and Master's degree students in the last 15 years and has consulted for a numberof industries. His areas of interest are compiler design, software architecture and distributed objects.

He is one of the editors of a handbook of advanced topics in compiler design to be published by CRC Press in September this year. Among his current research projects are: Just-In-Time Compilation for the Microsoft .NET Common Language Runtime and High Performance Fortran compilation for a Linux-based cluster. He is currently a Professor and the Chairman of the Computer Science and Automation at the Indian Institute of Science, Bangalore, India.

Kurzfassung

Every embedded system of today has a complex microprocessor in it, and frequently, it is a digital signal processor. Examples are mobile phones, hand-held patient monitoring systems etc. Such microprocessors have plenty of computing power and are difficult to program in assembly language. However, code generation technology for such processors is still not mature.

In the first talk, the tree pattern matching approach to machine code generation with adaptations needed to handle DAGs and SIMD instructions will be dealt with. The limitations of other approaches, the advantages of the tree pattern-matching approach, and the basic construction of a tree-pattern-matching-based code generator will be explained.

In the second talk, intruction scheduling approaches used for DSP architectures, viz., listscheduling and automaton-based scheduling will be highlighted. The different approaches to Modulo-scheduling, viz., iterative scheduling, slack scheduling and automaton-based scheduling will also be explained. The adaptation of these techniques to clusterarchitectures, which are among current research efforts, will be indicated.


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