\ Article: 82639 of comp.lang.forth \ X-Received: by 10.202.83.201 with SMTP id h192mr3848934oib.106.1504983187581; \ Sat, 09 Sep 2017 11:53:07 -0700 (PDT) \ X-Received: by 10.31.152.136 with SMTP id a130mr57790vke.15.1504983187525; \ Sat, 09 Sep 2017 11:53:07 -0700 (PDT) \ Path: eternal-september.org!news.eternal-september.org!feeder.eternal-september.org!news.swapon.de!weretis.net!feeder6.news.weretis.net!feeder.usenetexpress.com!feeder-in1.iad1.usenetexpress.com!border1.nntp.dca1.giganews.com!nntp.giganews.com!o200no1359919itg.0!news-out.google.com!j49ni732qtc.1!nntp.google.com!b1no387174qtc.1!postnews.google.com!glegroupsg2000goo.googlegroups.com!not-for-mail \ Newsgroups: comp.lang.forth \ Date: Sat, 9 Sep 2017 11:53:07 -0700 (PDT) \ Complaints-To: groups-abuse@google.com \ Injection-Info: glegroupsg2000goo.googlegroups.com; posting-host=184.186.219.230; \ posting-account=6GCGIQoAAAAyO8IjR_VTwqiqLwx0Q_G8 \ NNTP-Posting-Host: 184.186.219.230 \ User-Agent: G2/1.0 \ MIME-Version: 1.0 \ Message-ID: \ Subject: Hardware simulation in Forth \ From: Brad Eckert \ Injection-Date: Sat, 09 Sep 2017 18:53:07 +0000 \ Content-Type: text/plain; charset="UTF-8" \ Lines: 52 \ Xref: news.eternal-september.org comp.lang.forth:82639 \ \ Hi All, \ \ I discovered a one-screen discrete event simulation this morning, suitable for simulating hardware in Forth before re-coding in Verilog. Its performance depends on a fast CMOVE. \ \ In VFX, a small hardware simulation (simple counter) ran at ~30 MHz on my laptop. SwiftForth was ~11 MHz, but then it has a simplistic CMOVE. It seems like a good way to do hardware development on components you want to simulate in real time. \ with improvements by pahihu \ <204a40c6-8e16-4645-b12c-81d2d85f5332@googlegroups.com> \ Discrete Event Simulation for Hardware Sims 9/9/17 BNE 64 value |regs| variable regptr \ 16 32-bit regs |regs| 2* buffer: regs regs regptr ! : WIRE ( -- ) create 0 , ['] ! , does> @ ; : r! ( n addr -- ) @ |regs| + ! ; : REG ( -- ) create regptr @ , ['] r! , 1 cells regptr +! does> @ @ ; [defined] use-original [if] : /CLK ( -- ) regs dup |regs| + |regs| move ; : CLK/ ( -- ) regs |regs| + regs |regs| move ; [else] : Nregs ( -- n ) regPtr @ regs - ; : /CLK ( -- ) regs dup |regs| + Nregs move ; : CLK/ ( -- ) regs |regs| + regs Nregs move ; [then] : POR ( -- ) regs |regs| erase ; : (=>) ( addr -- ) dup cell+ @ execute ; : => ( n -- ) state @ if ' >body postpone literal postpone (=>) else ' >body (=>) then ; immediate \ Support for smaller registers : WIRE8 ( -- ) create 0 , ['] c! , does> c@ ; : rc! ( n addr -- ) @ |regs| + c! ; : REG8 ( -- ) create regptr @ , ['] rc! , 1 regptr +! does> @ c@ ; \ counter demo REG tally POR WIRE foo : CYCLE ( -- ) \ synchronous logic /CLK tally 1+ => tally tally 9 = if 0 => tally then CLK/ ; : cycles ( n -- ) 0 ?do cycle tally . loop ; \ [undefined] ticks [if] : ticks counter ; [then] : bench ( -- ) ( ticks ) 10000000 0 do cycle loop ( ticks swap - . ." ns/cycle" ) ; cr bench \ i7 laptop SwiftForth = 11MHz, VFX = 32MHz cr foo . 11 => foo foo .