5.26.6 MIPS assembler

The MIPS assembler was originally written by Christian Pirker.

Currently the assembler and disassembler only cover the MIPS-I architecture (R3000), and don't support FP instructions.

The register names $a0–$a3 are not available to avoid shadowing hex numbers.

Because there is no way to distinguish registers from immediate values, you have to explicitly use the immediate forms of instructions, i.e., addiu,, not just addu, (as does this implicitly).

If the architecture manual specifies several formats for the instruction (e.g., for jalr,), you usually have to use the one with more arguments (i.e., two for jalr,). When in doubt, see arch/mips/testasm.fs for an example of correct use.

Branches and jumps in the MIPS architecture have a delay slot. You have to fill it yourself (the simplest way is to use nop,), the assembler does not do it for you (unlike as). Even if,, ahead,, until,, again,, while,, else, and repeat, need a delay slot. Since begin, and then, just specify branch targets, they are not affected.

Note that you must not put branches, jumps, or li, into the delay slot: li, may expand to several instructions, and control flow instructions may not be put into the branch delay slot in any case.

For branches the argument specifying the target is a relative address; You have to add the address of the delay slot to get the absolute address.

The MIPS architecture also has load delay slots and restrictions on using mfhi, and mflo,; you have to order the instructions yourself to satisfy these restrictions, the assembler does not do it for you.

You can specify the conditions for if, etc. by taking a conditional branch and leaving away the b at the start and the , at the end. E.g.,

     4 5 eq if,
       ... \ do something if $4 equals $5
     then,